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1220 commits

Author SHA1 Message Date
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476dfdf731 samplerjit: Add more bits for S/T, skip multiply. 
For now, we're not using those other bits yet.
 2021-12-27 18:24:37 -08:00
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9cc0883d53 softgpu: Correct non-SSE T clamp. 2021-12-27 15:31:37 -08:00
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39d5b1c221 softgpu: Reduce mipmap fraction to 4 bits. 
For CONST (and SLOPE with flat w), this produces accurate values.
SLOPE is still wrong in its handling of w, and AUTO seems to calculate
using a different and less accurate ramp.  But they both produce values
with 16 steps, in any case.
 2021-12-27 11:37:33 -08:00
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d6b6ef4cb1 softgpu: Correct nearest filtering too. 
Turns out to have the same behavior as linear, when it comes to the
subpixel offset.
 2021-12-27 11:37:33 -08:00
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1dfaea9062 softgpu: Remove no longer possible report. 
Also, it's known how this behaves, now.
 2021-12-27 11:37:33 -08:00
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75f105f84b softgpu: Make linear filtering more accurate. 
This matches tests for various u/v offsets and x/y subpixel offsets.
Mipmaps are probably still wrong.
 2021-12-27 11:37:32 -08:00
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3cd19b02ac samplerjit: Handle unswizzled offsets too. 2021-12-27 11:37:32 -08:00
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820361f34b samplerjit: Calculate texel byte offset as vector. 2021-12-27 11:37:32 -08:00
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4d6a2f3919 samplerjit: Blend linear using integers. 2021-12-27 11:37:32 -08:00
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6f4e735757 samplerjit: Accumulate results in an XMM. 2021-12-27 11:37:32 -08:00
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b00a66e34c samplerjit: Pass u/v coords as vector. 2021-12-27 11:37:32 -08:00
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ce3e29a649 softjit: Fix a function arg template warning. 
We're just ignoring it because it's a false positive in this case.
 2021-12-11 10:45:27 -08:00
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0d4ec5ca20 softjit: Fix an enum type comparion error. 
Same values, though, so didn't matter.
 2021-12-11 10:45:27 -08:00
Henrik Rydgård
818f33d979
Merge pull request #15225 from unknownbrackets/softjit-cond-fix 
softjit: Throw away regs allocated in conditionals
 2021-12-11 09:30:43 +01:00
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5593b8ff64 softjit: Skip a common case CMP. 2021-12-11 00:06:45 -08:00
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d35ef352c3 softjit: Throw away regs allocated in conditionals. 
If this happens, the register no longer has a deterministic value.
 2021-12-11 00:06:14 -08:00
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b3cd135000 samplerjit: Fix DXT1/DXT5 register releasing. 
Oops, broke this while refactoring.
 2021-12-09 08:17:29 -08:00
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3180e6c043 softgpu: Correct alpha on add + invalid texfuncs. 2021-12-05 16:28:37 -08:00
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325a1f75aa softgpu: Match texenv blend texfunc accurately. 2021-12-05 16:09:26 -08:00
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0b6e7c421f softgpu: Make decal tex func more accurate. 
Tested for all values of A * B + 0 * (255 - B), as well as A * 127 + B *
(255 - 127), and matches accurately.  Spot checked other values, but not
exhaustively.
 2021-12-05 13:34:19 -08:00
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154bb53744 softgpu: Correct accuracy on fast path modulate. 2021-12-05 13:10:18 -08:00
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73460f7461 softgpu: Correct accuracy of MODULATE texfunc. 
This matches hardware tests for every value of A * B.
Interesting that it's a different formula than alpha blend.
 2021-12-05 12:06:52 -08:00
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891fa8c613 softgpu: Template away uncommon mip usage. 
Improves general case about 10%.
 2021-12-04 15:45:06 -08:00
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48e9404419 softgpu: Remove useless switch by UV gen mode. 
They're all handled earlier now, and the switch is on a value & 3, so the
default wasn't even possible.
 2021-12-04 15:45:06 -08:00
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ff94974df9 softgpu: Avoid texlevel check when maxlevel is 0. 2021-12-04 15:45:06 -08:00
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823c4adb15 softgpu: Keep arguments in vectors for sampling. 2021-12-04 15:45:06 -08:00
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d7c25b3e7c samplerjit: Refactor nearest using reg cache. 2021-12-04 13:04:53 -08:00
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4aa5bee14c softjit: Make it an error to unlock a temp. 
Also fix some register usage in logic ops.
 2021-12-01 21:50:02 -08:00
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75a918f96f softjit: Get rid of pointless AGE00 tests. 2021-12-01 21:44:10 -08:00
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f47fb7e14e softjit: Normalize some stencil test patterns. 2021-12-01 21:43:52 -08:00
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ba69e39256 softjit: Avoid tests for greater than 0. 
They take more instructions, and can be somewhat common.
 2021-12-01 21:40:10 -08:00
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aec41b34d6 softjit: Reduce ditherMatrix to 8-bit. 
Oops, not sure why I made it 16 bit.
 2021-12-01 21:39:29 -08:00
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1c5615624a softjit: Oops, correct allocation typo. 
Decided to leave these for paired operations.
 2021-12-01 21:37:55 -08:00
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bfe82e417d softjit: Fix locked stencil reg. 2021-11-28 20:26:01 -08:00
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99c213f244 softjit: Centralize argument register allocation. 2021-11-28 15:53:24 -08:00
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7aea6d2ab0 softjit: Fix fog typo causing locking bug. 2021-11-28 12:26:23 -08:00
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9653c33d9c softjit: Fix PixelFuncID arg on non-Windows x64. 
Oops, this is of course not put on the stack, it's in R8.
 2021-11-28 08:54:36 -08:00
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2d8fdd8cf4 Math3D: Allow construction from NEON vectors. 
This makes it match SSE and easier to keep things generic.  Will impact
alignment of non-packed Vec2/Vec3.
 2021-11-28 08:24:53 -08:00
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96a7554053 sofjit: Move common types to reg cache header. 
This makes it easier to use vectors elsewhere.
 2021-11-28 08:03:15 -08:00
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3d5bced296 softjit: Rename reg cache so it can be reused. 
Intentionally just the name changes in this commit.
 2021-11-28 08:03:15 -08:00
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4703b6cb56 softjit: Cleanup, add other arch types to regcache. 2021-11-28 08:03:15 -08:00
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c1882fa1c0 softjit: Disallow use of register after unlock. 2021-11-28 08:03:14 -08:00
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2f039abd13 softjit: Simplify regcache usage as purpose only. 
Dealing with types was annoying, and this helps validate the right
register is released.
 2021-11-28 08:03:14 -08:00
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722c04c5e2 samplerjit: Allow disabling linear too, oops. 2021-11-28 08:03:14 -08:00
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cc099c73f1 softjit: Decide stack offset on compile. 
This makes it easier to compile different entries or push regs.
 2021-11-28 08:03:14 -08:00
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e1ed49a3e4 softjit: Ensure all regs are released. 2021-11-28 08:03:14 -08:00
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d53e13b862 softjit: Manage args in the register cache. 2021-11-28 08:03:13 -08:00
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6fbcf67093 softjit: Fix disabled cache. 2021-11-27 11:32:47 -08:00
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1cb48a7bd2 softjit: Reduce jit pool size a bit. 2021-11-26 10:30:00 -08:00
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1f9dc3a568 softjit: Precalculate write mask and dither. 
This is slightly abusing PixelFuncID, but the intent is to provide some
memory that's easily accessible from the jit func, but still associated
with that calculation (i.e. not global.)
 2021-11-26 10:12:54 -08:00