Commit graph

2798 commits

Author SHA1 Message Date
Henrik Rydgård
accd9b1f2c sc instruction: Make sure the rt register is mapped. Fixes Beats. 2023-09-11 14:18:58 +02:00
Henrik Rydgård
3acbeb3073 Add an assert in JitBlockCache 2023-09-11 13:59:04 +02:00
Maciej Barć
0cbca92b27
Core/MIPS/MIPSTables.h: add stdint.h include
Signed-off-by: Maciej Barć <xgqt@gentoo.org>
2023-09-09 16:52:09 +02:00
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7a5cdafdf3 arm64jit: Implement convert/int conversions. 2023-09-08 00:03:12 -07:00
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b698c673a8 arm64jit: Implement FSat. 2023-09-08 00:03:12 -07:00
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c523273d51 arm64jit: Implement vector unpacks. 2023-09-08 00:03:12 -07:00
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e03ae26d20 arm64jit: Implement vuc2i. 2023-09-08 00:02:53 -07:00
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a21a882add arm64jit: Implement a few vector ops. 2023-09-08 00:02:53 -07:00
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a8f81b4289 arm64jit: Add breakpoints/memchecks. 2023-09-08 00:02:53 -07:00
Henrik Rydgård
ce4ee78157
Merge pull request #18099 from unknownbrackets/include-guards
Build: Add some missing include guards.
2023-09-08 08:33:53 +02:00
Henrik Rydgård
0a234df037
Merge pull request #18089 from unknownbrackets/arm64jit-float
arm64jit: Implement VFPU compare, trig, couple others
2023-09-08 08:33:22 +02:00
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1a37b4b3fd Core: Stop including Rng so widely.
It's no longer on the MIPS struct.
2023-09-07 17:56:46 -07:00
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5617d08620 arm64jit: Remove unused variable. 2023-09-07 17:26:30 -07:00
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cec9dbbdf7 Build: Add some missing include guards. 2023-09-07 17:14:58 -07:00
Nemoumbra
0faa1109d2 Included <algorithm> for std::min 2023-09-07 12:14:36 +03:00
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03f22beefd arm64jit: Implement Vec2Pack32To16. 2023-09-06 20:20:52 -07:00
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178bb8416b arm64jit: Implement FSpecial. 2023-09-06 20:08:36 -07:00
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fad24e3b44 arm64jit: Implement FSign. 2023-09-06 19:53:49 -07:00
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a1304f6ac8 arm64jit: Implement VFPU compare in IR. 2023-09-06 19:02:24 -07:00
Henrik Rydgård
a84f08e55e Typo fix
See #18080
2023-09-06 11:21:41 +02:00
Henrik Rydgård
1bfa566b3d
Merge pull request #18081 from unknownbrackets/arm64jit-float
arm64jit: Implement some float compares and conversions
2023-09-06 10:11:56 +02:00
Henrik Rydgård
f2512e0fdd
Merge pull request #18080 from unknownbrackets/x86jit-minor
x86jit: Correct jitbase range comparison
2023-09-06 09:23:55 +02:00
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01ed48a3d0 arm64jit: Implement FCvtSW. 2023-09-06 00:09:26 -07:00
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89a9584c38 arm64jit: Implement FRound/similar. 2023-09-06 00:09:26 -07:00
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97d9a7f07f arm64jit: Implement FCmp. 2023-09-06 00:09:26 -07:00
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c8f888fab0 arm64jit: Implement FMin/FMax. 2023-09-06 00:09:26 -07:00
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0fc337cdc1 x86jit: Correct jitbase range comparison. 2023-09-05 23:56:36 -07:00
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953d97b54a arm64jit: Implement Vec4Init. 2023-09-05 00:10:26 -07:00
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11f92b4684 arm64jit: Implement Vec4Dot. 2023-09-05 00:10:26 -07:00
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81aeb04788 arm64jit: Implement Vec4Blend. 2023-09-05 00:10:26 -07:00
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85387b44a1 arm64jit: Implement Vec4Scale. 2023-09-05 00:10:26 -07:00
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3f29b4c713
Merge pull request #18068 from unknownbrackets/arm64jit-shuffle
arm64jit: Implement shuffle optimizer
2023-09-05 00:10:08 -07:00
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d8231ecb17 arm64jit: Implement divide in IR. 2023-09-04 23:38:55 -07:00
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c272284043 arm64jit: Implement multiplies in IR. 2023-09-04 23:38:55 -07:00
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17ffc9c261 arm64jit: Special case some shuffles.
To avoid 4 instruction shuffles.
2023-09-04 23:37:40 -07:00
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885ae5c805 arm64jit: Implement shuffle optimizer. 2023-09-04 12:27:39 -07:00
Henrik Rydgård
9690a71a14
Merge pull request #18061 from unknownbrackets/arm64-ir-jit
arm64jit: Implement most ALU and load/store in IR jit
2023-09-04 10:02:24 +02:00
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494aab62fc
Merge pull request #18063 from unknownbrackets/arm64-ir-float
arm64jit: Add some initial float and vec4 ops
2023-09-04 00:08:08 -07:00
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5134b7eedb
Merge pull request #18064 from unknownbrackets/arm64-ir-exit
arm64jit: Implement exits and a few system ops
2023-09-04 00:07:13 -07:00
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85b80bc9e5 arm64jit: Implement load/store in IR. 2023-09-04 00:04:36 -07:00
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ccee8e41ee arm64jit: Implement exits. 2023-09-03 21:16:08 -07:00
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e02426cbbf arm64jit: Implement some system ops. 2023-09-03 21:16:08 -07:00
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0933381b9e arm64jit: Add some simple vec4 ops. 2023-09-03 21:14:58 -07:00
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87b9633258 arm64jit: Add some simple float ops. 2023-09-03 21:14:58 -07:00
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1042737c21 irjit: Correct metadata on Vec2 packing ops. 2023-09-03 21:13:11 -07:00
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c44f0e1fca arm64jit: Implement most ALU in IR jit. 2023-09-03 15:30:55 -07:00
Henrik Rydgård
2f300c2023
Merge pull request #18060 from unknownbrackets/x86-jitbase
x86jit: Bake emuhack mask into jitbase
2023-09-03 22:53:23 +02:00
Henrik Rydgård
daa0586641
Merge pull request #18059 from unknownbrackets/arm64-ir-jit
arm64jit: Add initial base for IR jit
2023-09-03 22:33:24 +02:00
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9439a43323 riscv: Correct an overlap case, fix assert. 2023-09-03 13:29:57 -07:00
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0452b8b57a riscv: Account for emuhack in JITBASEREG. 2023-09-03 13:29:05 -07:00