Henrik Rydgård
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accd9b1f2c
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sc instruction: Make sure the rt register is mapped. Fixes Beats.
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2023-09-11 14:18:58 +02:00 |
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Henrik Rydgård
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3acbeb3073
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Add an assert in JitBlockCache
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2023-09-11 13:59:04 +02:00 |
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Maciej Barć
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0cbca92b27
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Core/MIPS/MIPSTables.h: add stdint.h include
Signed-off-by: Maciej Barć <xgqt@gentoo.org>
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2023-09-09 16:52:09 +02:00 |
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Unknown W. Brackets
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7a5cdafdf3
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arm64jit: Implement convert/int conversions.
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2023-09-08 00:03:12 -07:00 |
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Unknown W. Brackets
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b698c673a8
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arm64jit: Implement FSat.
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2023-09-08 00:03:12 -07:00 |
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Unknown W. Brackets
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c523273d51
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arm64jit: Implement vector unpacks.
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2023-09-08 00:03:12 -07:00 |
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Unknown W. Brackets
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e03ae26d20
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arm64jit: Implement vuc2i.
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2023-09-08 00:02:53 -07:00 |
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Unknown W. Brackets
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a21a882add
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arm64jit: Implement a few vector ops.
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2023-09-08 00:02:53 -07:00 |
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Unknown W. Brackets
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a8f81b4289
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arm64jit: Add breakpoints/memchecks.
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2023-09-08 00:02:53 -07:00 |
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Henrik Rydgård
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ce4ee78157
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Merge pull request #18099 from unknownbrackets/include-guards
Build: Add some missing include guards.
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2023-09-08 08:33:53 +02:00 |
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Henrik Rydgård
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0a234df037
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Merge pull request #18089 from unknownbrackets/arm64jit-float
arm64jit: Implement VFPU compare, trig, couple others
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2023-09-08 08:33:22 +02:00 |
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Unknown W. Brackets
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1a37b4b3fd
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Core: Stop including Rng so widely.
It's no longer on the MIPS struct.
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2023-09-07 17:56:46 -07:00 |
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Unknown W. Brackets
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5617d08620
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arm64jit: Remove unused variable.
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2023-09-07 17:26:30 -07:00 |
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Unknown W. Brackets
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cec9dbbdf7
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Build: Add some missing include guards.
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2023-09-07 17:14:58 -07:00 |
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Nemoumbra
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0faa1109d2
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Included <algorithm> for std::min
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2023-09-07 12:14:36 +03:00 |
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Unknown W. Brackets
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03f22beefd
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arm64jit: Implement Vec2Pack32To16.
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2023-09-06 20:20:52 -07:00 |
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Unknown W. Brackets
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178bb8416b
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arm64jit: Implement FSpecial.
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2023-09-06 20:08:36 -07:00 |
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Unknown W. Brackets
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fad24e3b44
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arm64jit: Implement FSign.
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2023-09-06 19:53:49 -07:00 |
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Unknown W. Brackets
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a1304f6ac8
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arm64jit: Implement VFPU compare in IR.
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2023-09-06 19:02:24 -07:00 |
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Henrik Rydgård
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a84f08e55e
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Typo fix
See #18080
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2023-09-06 11:21:41 +02:00 |
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Henrik Rydgård
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1bfa566b3d
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Merge pull request #18081 from unknownbrackets/arm64jit-float
arm64jit: Implement some float compares and conversions
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2023-09-06 10:11:56 +02:00 |
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Henrik Rydgård
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f2512e0fdd
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Merge pull request #18080 from unknownbrackets/x86jit-minor
x86jit: Correct jitbase range comparison
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2023-09-06 09:23:55 +02:00 |
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Unknown W. Brackets
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01ed48a3d0
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arm64jit: Implement FCvtSW.
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2023-09-06 00:09:26 -07:00 |
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Unknown W. Brackets
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89a9584c38
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arm64jit: Implement FRound/similar.
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2023-09-06 00:09:26 -07:00 |
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Unknown W. Brackets
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97d9a7f07f
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arm64jit: Implement FCmp.
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2023-09-06 00:09:26 -07:00 |
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Unknown W. Brackets
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c8f888fab0
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arm64jit: Implement FMin/FMax.
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2023-09-06 00:09:26 -07:00 |
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Unknown W. Brackets
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0fc337cdc1
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x86jit: Correct jitbase range comparison.
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2023-09-05 23:56:36 -07:00 |
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Unknown W. Brackets
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953d97b54a
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arm64jit: Implement Vec4Init.
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2023-09-05 00:10:26 -07:00 |
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Unknown W. Brackets
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11f92b4684
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arm64jit: Implement Vec4Dot.
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2023-09-05 00:10:26 -07:00 |
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Unknown W. Brackets
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81aeb04788
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arm64jit: Implement Vec4Blend.
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2023-09-05 00:10:26 -07:00 |
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Unknown W. Brackets
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85387b44a1
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arm64jit: Implement Vec4Scale.
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2023-09-05 00:10:26 -07:00 |
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Unknown W. Brackets
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3f29b4c713
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Merge pull request #18068 from unknownbrackets/arm64jit-shuffle
arm64jit: Implement shuffle optimizer
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2023-09-05 00:10:08 -07:00 |
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Unknown W. Brackets
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d8231ecb17
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arm64jit: Implement divide in IR.
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2023-09-04 23:38:55 -07:00 |
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Unknown W. Brackets
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c272284043
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arm64jit: Implement multiplies in IR.
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2023-09-04 23:38:55 -07:00 |
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Unknown W. Brackets
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17ffc9c261
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arm64jit: Special case some shuffles.
To avoid 4 instruction shuffles.
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2023-09-04 23:37:40 -07:00 |
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Unknown W. Brackets
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885ae5c805
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arm64jit: Implement shuffle optimizer.
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2023-09-04 12:27:39 -07:00 |
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Henrik Rydgård
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9690a71a14
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Merge pull request #18061 from unknownbrackets/arm64-ir-jit
arm64jit: Implement most ALU and load/store in IR jit
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2023-09-04 10:02:24 +02:00 |
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Unknown W. Brackets
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494aab62fc
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Merge pull request #18063 from unknownbrackets/arm64-ir-float
arm64jit: Add some initial float and vec4 ops
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2023-09-04 00:08:08 -07:00 |
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Unknown W. Brackets
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5134b7eedb
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Merge pull request #18064 from unknownbrackets/arm64-ir-exit
arm64jit: Implement exits and a few system ops
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2023-09-04 00:07:13 -07:00 |
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Unknown W. Brackets
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85b80bc9e5
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arm64jit: Implement load/store in IR.
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2023-09-04 00:04:36 -07:00 |
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Unknown W. Brackets
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ccee8e41ee
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arm64jit: Implement exits.
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2023-09-03 21:16:08 -07:00 |
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Unknown W. Brackets
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e02426cbbf
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arm64jit: Implement some system ops.
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2023-09-03 21:16:08 -07:00 |
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Unknown W. Brackets
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0933381b9e
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arm64jit: Add some simple vec4 ops.
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2023-09-03 21:14:58 -07:00 |
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Unknown W. Brackets
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87b9633258
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arm64jit: Add some simple float ops.
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2023-09-03 21:14:58 -07:00 |
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Unknown W. Brackets
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1042737c21
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irjit: Correct metadata on Vec2 packing ops.
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2023-09-03 21:13:11 -07:00 |
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Unknown W. Brackets
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c44f0e1fca
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arm64jit: Implement most ALU in IR jit.
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2023-09-03 15:30:55 -07:00 |
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Henrik Rydgård
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2f300c2023
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Merge pull request #18060 from unknownbrackets/x86-jitbase
x86jit: Bake emuhack mask into jitbase
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2023-09-03 22:53:23 +02:00 |
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Henrik Rydgård
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daa0586641
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Merge pull request #18059 from unknownbrackets/arm64-ir-jit
arm64jit: Add initial base for IR jit
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2023-09-03 22:33:24 +02:00 |
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Unknown W. Brackets
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9439a43323
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riscv: Correct an overlap case, fix assert.
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2023-09-03 13:29:57 -07:00 |
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Unknown W. Brackets
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0452b8b57a
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riscv: Account for emuhack in JITBASEREG.
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2023-09-03 13:29:05 -07:00 |
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