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222 commits

Author SHA1 Message Date
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fa7ac7bc64 interp: Correct simple vmov variant prefixing. 2019-03-31 15:01:28 -07:00
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01aebe54b9 interp: Correct vdet prefix handling. 2019-03-31 15:01:11 -07:00
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cc58d0d3a3 interp: Correct prefixes in vsrt ops. 2019-03-31 15:00:12 -07:00
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f2be0cb083 interp: Correct prefixes for vsbn/vsbz. 2019-03-31 13:52:59 -07:00
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175ceef583 interp: Cleanup vsocp size handling. 2019-03-31 13:52:07 -07:00
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4a2f8a74dc interp: Correct size handling for vi2x ops. 2019-03-31 13:51:12 -07:00
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b75690787e interp: Correct swizzle on vx2i ops. 2019-03-31 13:51:12 -07:00
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68cdcba6c5 interp: Don't write lane 2 on single colorconv. 
Not that it's valid to use the op with that size anyway.
 2019-03-31 13:51:12 -07:00
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5736b1be2a interp: Correct some negative invalid zero cases. 
In these cases, the input value wires to +0.  Also, transposed the values
in a comment (oops.)
 2019-03-31 13:45:37 -07:00
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aa998b815c interp: Force vscmp result of invalid to zero. 
Some other ops do this, but mostly only that do plus or minus.
 2019-03-31 13:41:48 -07:00
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5749ae09d0 interp: Correct vmfvc register behavior. 
The target and source registers were completely wrong.
 2019-03-31 13:41:48 -07:00
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b2e024025f interp: Handle wrong sizes of vf2h/vh2f. 
Probably not ever used, but they have consistent behavior.
 2019-03-31 13:41:48 -07:00
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aceb0a8244 interp: Correct vrnd prefix handling. 
We don't match random values perfectly anyway, but at least we should vary
at the right times.
 2019-03-31 13:41:48 -07:00
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dfc2449f35 interp: Match actual vdiv prefix handling. 2019-03-31 13:41:48 -07:00
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af3ed69144 interp: Mask moves to vfpu ctrl. 
These bits of the registers can't be written.
 2019-03-31 10:37:07 -07:00
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2a5d4e577d interp: Handle NAN more correctly in vscmp. 2019-03-31 10:37:07 -07:00
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db28c61272 interp: Handle flush prefixes slightly better. 2019-03-31 10:37:07 -07:00
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d40ac043d4 interp: Handle prefixes for Vmmov/Vmmul/Vmscl. 
I doubt any actual code uses this, but we have some tricky VFPU bugs left,
so just trying for maximum accuracy in the interpreter.
 2019-03-31 10:37:07 -07:00
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26b1368f7b interp: Handle vrot prefixes mostly correctly. 
Still some issues with 1/2 results and negate on swizzle.
 2019-03-31 10:37:07 -07:00
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8fd8dce185 interp: Use a helper to generate prefix consts. 
This makes more logical sense that using the VFPU_SWIZZLE and VFPU_ABS
macros to select the constant, although that's how the bits work.
 2019-03-31 10:33:26 -07:00
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b86a6af364 interp: Properly apply mask on single lane ops. 
When using something like vadd.s, we should still be applying the mask.
Mainly should only matter if masks are set in a conditional, or if games
nop out instructions.
 2019-03-31 10:13:28 -07:00
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1936e8c4d1 interp: Generate constants using prefixes. 
This way they properly respect negate in the S prefix.
 2019-03-31 10:13:28 -07:00
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0be3213151 interp: Correct vscl prefix handling. 2019-03-31 10:13:28 -07:00
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ec1dae57eb interp: Fix vbfy prefix handling. 2019-03-31 10:09:18 -07:00
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d5273f589a interp: Mask value in vpfxd. 
The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
 2019-03-31 08:23:36 -07:00
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9d1d4473e8 interp: Confirm vi2f/vf2i prefix handling. 2019-03-31 08:22:52 -07:00
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30223cb17f interp: Apply T prefix to D in vcmov. 2019-03-31 08:22:15 -07:00
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cfab70f149 interp: Handle abs/neg on nan values better. 
`fabsf` was altering other bits.
 2019-03-31 08:18:49 -07:00
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aff1d8e8b2 interp: Implement vsbz and vlgb. 
Not sure any games actually use them, but good to have the remaining vfpu
ops all implemented.
 2019-02-23 15:08:49 -08:00
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179ec61815 interp: Correctly handle vsocp prefixes. 
Very similar to vsop, just with a bit more fixed values.
 2019-02-23 10:05:13 -08:00
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6178a1fb33 Jit: Correct vocp prefix handling. 
See #5549.  Matches tests for various prefix settings.
 2019-02-23 09:15:26 -08:00
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d7f40afd9d interp: Correct vocp prefix handling. 
Also, guess that vsocp also applies prefixes.  See #5549.
 2019-02-21 19:02:16 -08:00
Henrik Rydgård
813c376aed Tiny change to work around internal compiler error (!) in 32-bit builds with latest MSVC update 2018-02-11 13:39:04 +01:00
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e960158490 jit-ir: Add notes and report about vrot prefixes. 2016-05-15 14:08:59 -07:00
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ab1461faca Add prefix handling to vfpu color conv per tests. 2016-05-15 13:16:03 -07:00
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3f0fc2d851 jit-ir: Fix FSat0_1 behavior on -0.0f. 2016-05-15 13:10:49 -07:00
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fa61deae3d Remove unused value. 2016-05-15 12:43:35 -07:00
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fc0788bc95 Avoid unpredictable behavior in error condition. 2015-04-08 11:57:57 -07:00
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07982a31c2 Make sure an error case has defined behavior. 2015-01-19 08:55:37 -08:00
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603fb0a7f7 Clarify that some casts are not accidents. 2015-01-19 08:51:30 -08:00
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71eb709845 fixup! Fix some missing case warnings. 2014-12-20 09:11:45 -08:00
Henrik Rydgard
e3a81f4346 x86 Jit: Basic implementation of vbfy1/2 (mostly to just cross another one off the list..) 2014-12-04 00:18:58 +01:00
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316e923b40 x86jit: Implement other forms of vx2i. 
Gains 3.2% performance in Grand Knights History.
 2014-11-08 00:39:40 -08:00
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fd1b01b573 Fix the vrndi.s output range. 
Was previously outputting only valid positive float values, but should use
a much wider range of a u32.

Might've affected randomness in some games.
 2014-09-01 22:33:01 -07:00
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252100aee5 Remove outdated comment (real cause found/fixed.) 2014-06-28 16:06:10 -07:00
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62daf6d7c8 armjit: Fix vmin/vmax to follow the PSP's rules. 
Also the interpreter.  Fixes #6107.
 2014-06-20 23:55:33 -07:00
Henrik Rydgard
0879d76503 VFPU: Ensure that sin(4*x) returns 0.0 (and cos 1) for all x. Fixes #2921 2014-06-15 11:03:00 +02:00
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69b0b622be armjit: Fix D-prefix sat clamp NAN handling. 
They should leave NAN alone.
 2014-05-16 01:04:57 -07:00
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a3ad238a44 Add notes for proper NaN handling in vmin/vmax. 2014-05-16 01:04:56 -07:00
Henrik Rydgard
c80510fb3b MemMap should not be included in MIPS.h. 2014-03-15 10:45:39 +01:00