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221 commits

Author SHA1 Message Date
Henrik Rydgård
0e3c1df9b3 Add a way to access the ImDebugger from the DevMenu 2024-11-21 15:48:18 +01:00
Henrik Rydgård
cf678a1aa6 JIT: Allow more blocks to be stored in the cache. Also, add margin to the IsFull check. 2024-10-28 17:02:03 +01:00
Henrik Rydgård
c1d6b62625 Add a couple of asserts to the JitBlockCache. 2024-10-23 13:23:38 +02:00
Henrik Rydgård
e01ca5b057
Logging API change (refactor) (#19324) 
* Rename LogType to Log

* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.

* Mac/ARM64 buildfix

* Do the same with the hle result log macros

* Rename the log names to mixed case while at it.

* iOS buildfix

* Qt buildfix attempt, ARM32 buildfix
 2024-07-14 14:42:59 +02:00
Henrik Rydgård
0ea9120ca5 Add a stats view 2024-06-06 19:21:50 +02:00
Henrik Rydgård
294593f741 Fix IR profiling 2024-06-05 19:12:08 +02:00
Henrik Rydgård
3bb74ea9ad Rework the JitCompare window to hold a list of blocks, and allow some filtering and browsing 2024-06-05 18:16:33 +02:00
Henrik Rydgård
ba1ced77c3 IRJit block profiling basics 2024-06-05 13:02:40 +02:00
Henrik Rydgård
f2837e3b55 JIT compare screen with IR blocks - fix some crashing issues 2024-05-26 14:10:50 +02:00
Henrik Rydgård
e75e7a0e43 Add an optimizeForInterpreter flag 2024-05-26 13:41:31 +02:00
Herman Semenov
17ecee1715 Fixed return copies from functions and const ref params 2024-04-02 18:37:00 +03:00
Henrik Rydgård
7e427e41d1 Remove a bunch of dead code from CoreTiming ("threadsafe" events) 
We haven't used these "threadsafe" events since we removed our first attempt
at GPU threading, so like 10 years, and maybe some experimentation in the
networking code according to some comments. It's unlikely that any
savestates that used these events would load anyway.
 2024-01-16 09:06:03 +01:00
Henrik Rydgård
3deabaeb04 JitBlockCache: Add a debug assert 2024-01-15 23:28:59 +01:00
Herman Semenov
b871e76d05 [Core/Debugger/FileLoaders/FileSystems/MIPS] Using reserve if possible 2023-12-15 13:59:19 +03:00
Henrik Rydgård
4c0077fd84 Protect against weirdness in UnlinkBlocks (hopefully not needed after prev fix) 2023-09-27 12:31:17 +02:00
Henrik Rydgård
dd2b1ace88 BlockCache on ARM/ARM64: Allow two more exits 2023-09-26 19:44:05 +02:00
Henrik Rydgård
c0ee711cb9 In the FinalizeBlock assert, extract some more info 2023-09-26 13:37:40 +02:00
Henrik Rydgård
e7c0b41867 Improve an assert 2023-09-22 10:58:43 +02:00
Henrik Rydgård
3acbeb3073 Add an assert in JitBlockCache 2023-09-11 13:59:04 +02:00
Unknown W. Brackets
1b756ff8c1 arm64jit: Add initial base for IR jit. 
This works, but very slowly at this point.
 2023-09-03 12:14:28 -07:00
Unknown W. Brackets
74e5e43fdc jit: Skip known prefix writes. 
If we already know what's in memory and it's default, we can skip
overwriting with default values.  This is common, actually.
 2023-08-22 23:26:31 -07:00
Unknown W. Brackets
622c69dbb9 x86jit: Expose option to select new IR based jit. 2023-08-20 22:28:54 -07:00
Unknown W. Brackets
2e6dbab5fa irjit: Add flag to prefer Vec4, use for add/sub. 
This will improve things when using SIMD.
 2023-08-13 18:10:40 -07:00
Unknown W. Brackets
fcc90095f7 riscv: Enable block linking. 2023-08-12 09:37:02 -07:00
Unknown W. Brackets
0d0029fc9d riscv: Add bitmanip ops to disasm. 2023-07-30 17:45:36 -07:00
Unknown W. Brackets
9f917488c3 riscv: Fix PC in disassembly. 2023-07-30 14:19:28 -07:00
Unknown W. Brackets
df2462b1d9 irjit: Implement ll/sc. 
These occur more than I expected in LittleBigPlanet while loading.
 2023-07-29 17:57:44 -07:00
Unknown W. Brackets
e271e43ec5 riscv: Initial staffolding for IR based jit. 2023-07-23 18:01:00 -07:00
Henrik Rydgård
9db9fec898 VFPU: Some micro-optimizations. Don't fall back to interpreter path for vexp/vlog/vrexp. 2023-06-04 11:28:33 +02:00
Henrik Rydgård
67a35d3476
Merge pull request #17356 from unknownbrackets/minor-cleanup 
Cleanup some more string formats, mostly in debugger
 2023-05-23 08:29:23 +02:00
Henrik Rydgård
4e732af786 Minor cleanup, add a speculative comment. 2023-05-04 10:07:49 +02:00
Henrik Rydgård
1a2d599942 JIT: Consider the block cache full a few block before it is, to allow space for proxy blocks. 
Should fix the following crash:

Core/MIPS/JitCommon/JitBlockCache.cpp:190

JitBlock &b = blocks_[num_blocks_];
 2023-05-02 21:53:01 +02:00
Unknown W. Brackets
46101581c0 Core: Cleanup disasm buffer usage. 2023-04-29 09:07:25 -07:00
Henrik Rydgård
6945deec01 Replace a LOT of sprintf with snprintf, and a few strcpy with truncate_cpy 2023-04-28 21:04:05 +02:00
Unknown W. Brackets
0f5859510e x86jit: Simplify memcheck handling. 
Now it's mostly the same as the other jits.
 2023-04-12 01:07:48 -07:00
Unknown W. Brackets
89c18d8077 riscv: Cleanup missing Poison, Crash. 2023-02-12 12:10:29 -08:00
Henrik Rydgård
e1a48d74c4 A bit more GetPointer cleanup. 
Probably not worth it for performance reasons, but some semantic cleanup
is good, especially the accidental GetPointer -> writable casts without
using GetPointerWrite.

Using Unchecked on already checked pointers, or when we'd crash anyway
if it returned nullptr, is good for clarity.
 2023-01-10 12:13:47 +01:00
Unknown W. Brackets
dea9cac16c Core: Add range checks to some helpers and similar. 2023-01-09 16:56:18 -08:00
Unknown W. Brackets
fb13dbf169 riscv: Correct type warning, oops. 2023-01-04 21:42:22 -08:00
Unknown W. Brackets
cee8bfd5cf riscv: Avoid a jit warning. 
We'll end up doing the same as arm64, most likely.
 2023-01-01 10:28:54 -08:00
Unknown W. Brackets
77849d3eed riscv: Add disassembler. 
From https://github.com/anthony-coulter/riscv-disassembler.
Modified slightly to pull in less headers in the h, prefix funcs.
 2023-01-01 10:28:53 -08:00
Unknown W. Brackets
b9fe48f42d Crash: Lookup block numbers more efficiently. 
We only care about the first one in these places anyway.  Also make sure
we don't try to match an invalid block number.
 2022-12-20 21:02:52 -08:00
Unknown W. Brackets
a7b7bf7826 Global: Set many read-only params as const. 
This makes what they do and which args to use clearer, if nothing else.
 2022-12-10 21:13:36 -08:00
Unknown W. Brackets
b9de1a44df jit: Reduce some include pollution. 
Usually no need for all of MIPSAnalyst.
 2022-10-27 23:26:44 -07:00
Henrik Rydgård
a34e32abe1 Revert "Disables "ForceCheck" on jit invalidation on ARM32, introduced in #16194" 
This reverts commit bc28f54612.
 2022-10-11 15:42:59 +02:00
Henrik Rydgård
bc28f54612 Disables "ForceCheck" on jit invalidation on ARM32, introduced in #16194 
I'm not sure if we should call it at all here, but at least this makes
games work again on ARM32. Will need more investigation.
 2022-10-11 10:10:52 +02:00
lainon
3cdf72b68b Better readability and optimization insertion into container by replacing 'insert' -> 'emplace', 'push_back' -> 'emplace_back' 2022-09-30 12:35:28 +03:00
Unknown W. Brackets
bac36df453 x86jit: Refactor and fix jump in branch delay slot. 
This seems cleaner, instead of the duplication of lines for each branch
type.
 2022-09-03 19:58:46 -07:00
Henrik Rydgård
584e94f01e ARM32: Remove a lot of non-NEON fallback paths 2022-04-13 11:44:55 +02:00
Unknown W. Brackets
2479d52202 Global: Reduce includes of common headers. 
In many places, string, map, or Common.h were included but not needed.
 2022-01-30 16:35:33 -08:00