[Core/Debugger/FileLoaders/FileSystems/MIPS] Using reserve if possible

Core/Debugger/DisassemblyManager.cpp

@@ -591,6 +591,7 @@ void DisassemblyFunction::addOpcodeSequence(u32 start, u32 end)
 	DisassemblyOpcode* opcode = new DisassemblyOpcode(start,(end-start)/4);
 	std::lock_guard<std::recursive_mutex> guard(lock_);
 	entries[start] = opcode;
+	lineAddresses.reserve((end - start) / 4);
 	for (u32 pos = start; pos < end; pos += 4)
 	{
 		lineAddresses.push_back(pos);

Core/Dialog/PSPGamedataInstallDialog.cpp

@@ -52,6 +52,7 @@ namespace
 	std::vector<std::string> GetPSPFileList (const std::string &dirpath) {
 		std::vector<std::string> FileList;
 		auto Fileinfos = pspFileSystem.GetDirListing(dirpath);
+		FileList.reserve(Fileinfos.size());
 
 		for (auto it = Fileinfos.begin(); it != Fileinfos.end(); ++it) {
 			std::string info = (*it).name;

Core/FileLoaders/DiskCachingFileLoader.cpp

@@ -127,6 +127,7 @@ std::vector<Path> DiskCachingFileLoader::GetCachedPathsInUse() {
 
 	// This is on the file loader so that it can manage the caches_.
 	std::vector<Path> files;
+	files.reserve(caches_.size());
 
 	for (auto it : caches_) {
 		files.push_back(it.first);

Core/FileSystems/ISOFileSystem.cpp

@@ -651,6 +651,7 @@ std::vector<PSPFileInfo> ISOFileSystem::GetDirListing(const std::string &path, b
 	const std::string dot(".");
 	const std::string dotdot("..");
 
+	myVector.reserve(entry->children.size() - 2);
 	for (size_t i = 0; i < entry->children.size(); i++) {
 		TreeEntry *e = entry->children[i];
 

Core/MIPS/ARM64/Arm64IRCompSystem.cpp

@@ -377,6 +377,7 @@ void Arm64JitBackend::CompIR_ValidateAddress(IRInst inst) {
 	ANDI2R(SCRATCH1, SCRATCH1, 0x3FFFFFFF, SCRATCH2);
 
 	std::vector<FixupBranch> validJumps;
+	validJumps.reserve(3);
 
 	FixupBranch unaligned;
 	if (alignment == 2) {

Core/MIPS/ARM64/Arm64IRJit.cpp

@@ -94,6 +94,7 @@ bool Arm64JitBackend::CompileBlock(IRBlock *block, int block_num, bool preload)
 	regs_.Start(block);
 
 	std::vector<const u8 *> addresses;
+	addresses.reserve(block->GetNumInstructions());
 	for (int i = 0; i < block->GetNumInstructions(); ++i) {
 		const IRInst &inst = block->GetInstructions()[i];
 		regs_.SetIRIndex(i);

Core/MIPS/IR/IRJit.cpp

@@ -410,6 +410,7 @@ JitBlockDebugInfo IRBlockCache::GetBlockDebugInfo(int blockNum) const {
 	ir.GetRange(start, size);
 	debugInfo.originalAddress = start;  // TODO
 
+	debugInfo.origDisasm.reserve(((start + size) - start) / 4);
 	for (u32 addr = start; addr < start + size; addr += 4) {
 		char temp[256];
 		MIPSDisAsm(Memory::Read_Instruction(addr), addr, temp, sizeof(temp), true);
@@ -417,6 +418,7 @@ JitBlockDebugInfo IRBlockCache::GetBlockDebugInfo(int blockNum) const {
 		debugInfo.origDisasm.push_back(mipsDis);
 	}
 
+	debugInfo.irDisasm.reserve(ir.GetNumInstructions());
 	for (int i = 0; i < ir.GetNumInstructions(); i++) {
 		IRInst inst = ir.GetInstructions()[i];
 		char buffer[256];

Core/MIPS/JitCommon/JitBlockCache.cpp

@@ -693,6 +693,7 @@ JitBlockDebugInfo JitBlockCache::GetBlockDebugInfo(int blockNum) const {
 	JitBlockDebugInfo debugInfo{};
 	const JitBlock *block = GetBlock(blockNum);
 	debugInfo.originalAddress = block->originalAddress;
+	debugInfo.origDisasm.reserve(((block->originalAddress + block->originalSize * 4) - block->originalAddress) / 4);
 	for (u32 addr = block->originalAddress; addr <= block->originalAddress + block->originalSize * 4; addr += 4) {
 		char temp[256];
 		MIPSDisAsm(Memory::Read_Instruction(addr), addr, temp, sizeof(temp), true);

Core/MIPS/JitCommon/JitCommon.cpp

@@ -135,6 +135,7 @@ std::vector<std::string> DisassembleArm2(const u8 *data, int size) {
 
 	char temp[256];
 	int bkpt_count = 0;
+	lines.reserve(size / 4);
 	for (int i = 0; i < size; i += 4) {
 		const u32 *codePtr = (const u32 *)(data + i);
 		u32 inst = codePtr[0];
@@ -196,6 +197,7 @@ std::vector<std::string> DisassembleArm64(const u8 *data, int size) {
 
 	char temp[256];
 	int bkpt_count = 0;
+	lines.reserve(size / 4);
 	for (int i = 0; i < size; i += 4) {
 		const u32 *codePtr = (const u32 *)(data + i);
 		uint64_t addr = (intptr_t)codePtr;

Core/MIPS/RiscV/RiscVJit.cpp

@@ -83,6 +83,7 @@ bool RiscVJitBackend::CompileBlock(IRBlock *block, int block_num, bool preload)
 	regs_.Start(block);
 
 	std::vector<const u8 *> addresses;
+	addresses.reserve(block->GetNumInstructions());
 	for (int i = 0; i < block->GetNumInstructions(); ++i) {
 		const IRInst &inst = block->GetInstructions()[i];
 		regs_.SetIRIndex(i);

Core/MIPS/x86/Jit.cpp

@@ -894,7 +894,7 @@ void Jit::CheckMemoryBreakpoint(int instructionOffset, MIPSGPReg rs, int offset)
 			SetJumpTarget(skipCheck);
 		}
 	} else {
-		const auto memchecks = CBreakPoints::GetMemCheckRanges(isWrite);
+		const auto &memchecks = CBreakPoints::GetMemCheckRanges(isWrite);
 		bool possible = !memchecks.empty();
 		if (!possible)
 			return;
@@ -908,6 +908,7 @@ void Jit::CheckMemoryBreakpoint(int instructionOffset, MIPSGPReg rs, int offset)
 		FlushAll();
 
 		std::vector<FixupBranch> hitChecks;
+		hitChecks.reserve(memchecks.size());
 		for (auto it = memchecks.begin(), end = memchecks.end(); it != end; ++it) {
 			if (it->end != 0) {
 				CMP(32, R(RAX), Imm32(it->start - size));

Core/MIPS/x86/JitSafeMem.cpp

@@ -455,6 +455,7 @@ void JitSafeMemFuncs::CreateWriteFunc(int bits, const void *fallbackFunc) {
 void JitSafeMemFuncs::CheckDirectEAX() {
 	// Clear any cache/kernel bits.
 	AND(32, R(EAX), Imm32(0x3FFFFFFF));
+	skips_.reserve(3);
 	
 	CMP(32, R(EAX), Imm32(PSP_GetUserMemoryEnd()));
 	FixupBranch tooHighRAM = J_CC(CC_AE);

Core/MIPS/x86/X64IRCompSystem.cpp

@@ -147,7 +147,7 @@ void X64JitBackend::CompIR_Breakpoint(IRInst inst) {
 			}
 			bool isWrite = MIPSAnalyst::IsOpMemoryWrite(checkedPC);
 
-			const auto memchecks = CBreakPoints::GetMemCheckRanges(isWrite);
+			const auto &memchecks = CBreakPoints::GetMemCheckRanges(isWrite);
 			// We can trivially skip if there are no checks for this type (i.e. read vs write.)
 			if (memchecks.empty())
 				break;
@@ -159,7 +159,8 @@ void X64JitBackend::CompIR_Breakpoint(IRInst inst) {
 			FlushAll();
 
 			std::vector<FixupBranch> hitChecks;
-			for (auto it : memchecks) {
+			hitChecks.reserve(memchecks.size());
+			for (const auto &it : memchecks) {
 				if (it.end != 0) {
 					CMP(32, R(SCRATCH1), Imm32(it.start - size));
 					FixupBranch skipNext = J_CC(CC_BE);
@@ -382,6 +383,7 @@ void X64JitBackend::CompIR_ValidateAddress(IRInst inst) {
 	AND(32, R(SCRATCH1), Imm32(0x3FFFFFFF));
 
 	std::vector<FixupBranch> validJumps;
+	validJumps.reserve(3);
 
 	FixupBranch unaligned;
 	if (alignment != 1) {

Core/Util/GameDB.cpp

@@ -9,6 +9,7 @@ GameDB g_gameDB;
 
 static void SplitCSVLine(const std::string_view str, std::vector<std::string_view> &result) {
 	result.clear();
+	result.reserve(str.size() + 1);
 
 	int indexCommaToLeftOfColumn = 0;
 	int indexCommaToRightOfColumn = -1;