mirror of
https://github.com/gligli/nulldc-360.git
synced 2025-04-02 11:11:56 -04:00
128 lines
No EOL
2.1 KiB
C++
128 lines
No EOL
2.1 KiB
C++
#include "regs.h"
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#include "Renderer_if.h"
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#include "ta.h"
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#include "spg.h"
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#include "threadedPvr.h"
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//seems to work allright .. ;P
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//many things need to be emulated , especialy to support lle emulation but for now that's not needed
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u8 regs[RegSize];
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u32 FASTCALL ReadPvrRegister(u32 addr,u32 size)
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{
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if (size!=4)
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{
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//error
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return 0;
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}
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return PvrReg(addr,u32);
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}
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void PrintfInfo();
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void FASTCALL WritePvrRegister(u32 paddr,u32 data,u32 size)
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{
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if (size!=4)
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{
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//error
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return;
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}
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u32 addr=paddr&RegMask;
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if (addr==ID_addr)
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return;//read olny
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if (addr==REVISION_addr)
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return;//read olny
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if (addr==STARTRENDER_addr)
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{
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//start render
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StartRender();
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render_end_pending=true;
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return;
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}
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if (addr==TA_LIST_INIT_addr)
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{
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if (data>>31)
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{
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ListInit();
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data=0;
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}
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}
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if (addr==SOFTRESET_addr)
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{
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if (data!=0)
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{
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if (data&1)
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{
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SoftReset();
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}
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data=0;
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}
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}
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if (addr==TA_LIST_CONT_addr)
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{
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//a write of anything works ?
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ListCont();
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}
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if (addr == FB_R_CTRL_addr ||
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addr == SPG_CONTROL_addr ||
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addr == SPG_LOAD_addr)
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{
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PvrReg(addr,u32)=data;
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CalculateSync();
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return;
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}
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if (addr>=PALETTE_RAM_START_addr)
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{
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if (PvrReg(addr,u32)!=data)
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{
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u32 pal=addr&1023;
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_pal_rev_256[pal>>8]++;
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_pal_rev_16[pal>>4]++;
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pal_needs_update=true;
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}
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}
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PvrReg(addr,u32)=data;
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}
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bool Regs_Init()
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{
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return true;
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}
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void Regs_Term()
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{
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}
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void Regs_Reset(bool Manual)
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{
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ID = 0x17FD11DB;
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REVISION = 0x00000011;
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SOFTRESET = 0x00000007;
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SPG_HBLANK_INT.full = 0x031D0000;
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SPG_VBLANK_INT.full = 0x01500104;
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FPU_PARAM_CFG = 0x0007DF77;
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HALF_OFFSET = 0x00000007;
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ISP_FEED_CFG = 0x00402000;
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SDRAM_REFRESH = 0x00000020;
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SDRAM_ARB_CFG = 0x0000001F;
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SDRAM_CFG = 0x15F28997;
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SPG_HBLANK.full = 0x007E0345;
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SPG_LOAD.full = 0x01060359;
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SPG_VBLANK.full = 0x01500104;
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SPG_WIDTH.full = 0x07F1933F;
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VO_CONTROL.full = 0x00000108;
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VO_STARTX.full = 0x0000009D;
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VO_STARTY.full = 0x00000015;
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SCALER_CTL.full = 0x00000400;
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FB_BURSTCTRL = 0x00090639;
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PT_ALPHA_REF = 0x000000FF;
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} |