Andrew Church
58d029b28f
Remove ThreadState.fpr_ps since it seems to be unnecessary.
2015-12-11 00:49:20 +09:00
Andrew Church
e7d8f4e134
Accidentally left in a debug line, take that out.
2015-12-10 16:01:07 +09:00
Andrew Church
12ca216998
Fix stores of floating-point zero.
2015-12-10 08:07:56 +09:00
Andrew Church
3cddd381b3
Fix quantize/dequantize operations.
2015-12-10 08:07:41 +09:00
Andrew Church
eb6921976d
Fix denormal handling in psq_st.
2015-12-10 08:07:28 +09:00
Andrew Church
9a11673e33
Fix paired-single move and load/store instructions.
...
Add a uint32_t alias for fpr_t.paired1 so moves don't generate exceptions
on the host.
2015-12-10 05:10:20 +09:00
Andrew Church
c6f0a37daf
Avoid exceptions and truncate ps1 rather than rounding in ps_merge.
2015-12-10 02:10:17 +09:00
Andrew Church
f5984b2f19
ps_cmp and ps_add (at least) use the full 64 bits of a loaded double value
...
and can still access an independent second paired-single slot, so change
the FPR data structure to allow storing both independently.
2015-12-10 02:08:57 +09:00
Andrew Church
9bc46eb966
Single-precision FP arithmetic instructions write to both paired-single slots.
2015-12-10 02:08:09 +09:00
Andrew Church
188e8eaae1
Document the behavior of single-precision FP instructions on out-of-range inputs.
2015-12-10 02:07:52 +09:00
James Benton
e51777c2ba
Fix missing algorithm include.
2015-12-09 02:08:27 +00:00
James Benton
9c18e72f23
Fix import section names.
2015-12-09 02:08:15 +00:00
James Benton
599fc0d4e6
Update CMakeLists.txt
2015-12-09 01:54:54 +00:00
James Benton
6cb6f5f8dd
Refactor shader translator and disassembler.
...
Now share a common decoder.
Decoder using AMD style structs and enums.
2015-12-09 01:51:09 +00:00
Andrew Church
10005b6e54
Add a paired-single mode bit for each FPR, since the CPU seems to
...
silently convert between paired-single and double-precision modes
depending on the instruction being executed.
2015-12-09 05:50:47 +09:00
Andrew Church
ee70e020ac
Delete extraneous declaration.
2015-12-09 05:50:22 +09:00
Andrew Church
6fe8e4241e
Fix wrong definition of xer_t.crxr.
2015-12-09 02:54:32 +09:00
Andrew Church
4cdfd4ebf9
s/(std::(fabs|sqrt))f/\1/
2015-12-09 01:47:03 +09:00
Andrew Church
007d6cff0b
Floating-point arithmetic instructions should not clear exception flags.
2015-12-09 00:53:20 +09:00
Andrew Church
8dda4f3eee
Merge fadd/fsub/fmul/fdiv into a single common routine.
2015-12-09 00:52:54 +09:00
Andrew Church
40559a8f2f
Fix wrong SPR numbers in mftb.
2015-12-09 00:03:50 +09:00
Andrew Church
4d5b32da1b
Add stub for icbi.
2015-12-09 00:03:40 +09:00
Andrew Church
bcc32aa5aa
Fix exception handling for fres and frsqrte.
2015-12-09 00:03:26 +09:00
Andrew Church
6c137ec1bb
Recognize the mfocrf and mtocrf instructions (treated as mfcr and mtcrf).
2015-12-09 00:03:17 +09:00
Andrew Church
ad3a402dd0
Merge fctiw and fctiwz implementations.
2015-12-09 00:03:07 +09:00
Andrew Church
e7fed6c560
Fix wrong values for FPSCR[RN] rounding modes.
2015-12-09 00:02:57 +09:00
Andrew Church
c9e7e1c403
Fix exception handling in fctiw.
2015-12-09 00:02:47 +09:00
Andrew Church
34773beb52
Fix fctiw rounding the wrong way in round-to-nearest mode.
2015-12-09 00:02:36 +09:00
Andrew Church
df367242dc
Rewrite the FP fused multiply-add instructions so they work correctly.
2015-12-09 00:02:26 +09:00
Andrew Church
2622f62634
Properly abort fdiv on an enabled zero-divide exception.
2015-12-09 00:02:16 +09:00
Andrew Church
1b2e2bfe1b
Catch 0*inf as well as inf*0 for VXIMZ.
2015-12-09 00:02:02 +09:00
Andrew Church
43edac538f
Adding/subtracting infinities is only invalid if the signs cancel.
2015-12-09 00:01:52 +09:00
Andrew Church
bcf91b642c
Floating point instructions don't write output if an enabled VX occurs.
2015-12-09 00:01:41 +09:00
Andrew Church
694307f217
Implement floating-point rounding modes.
2015-12-09 00:01:04 +09:00
Andrew Church
df14c77810
Fix failure to set FPSCR[FX] when an insn sets exception flags itself.
2015-12-09 00:00:44 +09:00
Andrew Church
ac69de4874
Ensure frsp does not leak host FP exceptions.
2015-12-09 00:00:26 +09:00
Andrew Church
c591396c6e
Fix incorrect FPRF logic.
2015-12-09 00:00:09 +09:00
Andrew Church
45e78f1717
Fix improper conversion of SNaNs to QNaNs when loading or storing floats.
2015-12-08 23:59:55 +09:00
Andrew Church
8059ab8d5a
Fix fcmpu/fcmpo leaking host exception flags.
2015-12-08 23:59:41 +09:00
Andrew Church
3c795032e5
Fix wrong sense of FPSCR[VE] test in fcmpo.
2015-12-08 23:59:29 +09:00
Andrew Church
d20b8f0a40
Fix use-before-set of VX in FPSCR exception update logic.
2015-12-08 23:59:19 +09:00
Andrew Church
64cdc10852
Fix fcmpo/fcmpu not updating FPSCR exception flags properly.
2015-12-08 23:59:09 +09:00
Andrew Church
c083d282cb
Fix fcmpo/fcmpu writing to the wrong bits of FPSCR.
2015-12-08 23:58:51 +09:00
Andrew Church
93f1f3f088
Fix wrong definition of floating-point registers.
2015-12-08 23:58:30 +09:00
Andrew Church
59f9f7e63e
Implement FPSCR read/write instructions, and fix handling of FPSCR[FX].
...
PowerPC UISA: "Every floating-point instruction, except mtfsfi and mtfsf,
implicitly sets FPSCR[FX] to 1 if that instruction causes any of the
floating-point exception bits in the FPSCR to _change_ from 0 to 1."
(emphasis added)
2015-12-08 23:57:46 +09:00
Andrew Church
5896fc0352
Implement overflow handling for mullw.
2015-12-08 23:57:28 +09:00
Andrew Church
ee8f8162aa
Allow mulhw/mulhwu with bit 21 set, since a real Espresso does.
2015-12-08 23:57:14 +09:00
Andrew Church
13f392e3cb
Fix bugs in format_string().
...
- Each va_list can only be used once; va_copy() is required if iterating
over the list twice.
- [v]snprintf() returns the number of characters in the formatted result
excluding the trailing null byte.
- C++11 does not require that a string implementation reserve space for
the trailing null byte.
- [v]snprintf() takes the size of the input buffer including the trailing
null byte, and truncates if necessary to add the trailing null.
2015-12-07 18:56:12 +09:00
Andrew Church
1e283bcb1a
Add implementation of __os_snprintf().
2015-12-07 18:56:00 +09:00
James Benton
5f9affe127
Rename _Exit to coreinit_Exit.
2015-12-06 21:29:09 +00:00
