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e2e72821e2
Oftentimes, many of our countrollers are just doing a simple countdown and don't perform any real work for the cycle. Pull those parts out into headers so that the compiler can 'see' that and optimize accordingly.
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
//
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// rsp/cpu.h: RSP processor container.
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//
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// CEN64: Cycle-Accurate Nintendo 64 Emulator.
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// Copyright (C) 2015, Tyler J. Stachecki.
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//
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// This file is subject to the terms and conditions defined in
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// 'LICENSE', which is part of this source code package.
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//
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#ifndef __rsp_cpu_h__
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#define __rsp_cpu_h__
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#include "common.h"
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#include "os/dynarec.h"
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#include "rsp/cp0.h"
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#include "rsp/cp2.h"
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#include "rsp/pipeline.h"
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enum rsp_register {
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RSP_REGISTER_R0, RSP_REGISTER_AT, RSP_REGISTER_V0,
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RSP_REGISTER_V1, RSP_REGISTER_A0, RSP_REGISTER_A1,
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RSP_REGISTER_A2, RSP_REGISTER_A3, RSP_REGISTER_T0,
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RSP_REGISTER_T1, RSP_REGISTER_T2, RSP_REGISTER_T3,
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RSP_REGISTER_T4, RSP_REGISTER_R5, RSP_REGISTER_T6,
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RSP_REGISTER_T7, RSP_REGISTER_S0, RSP_REGISTER_S1,
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RSP_REGISTER_S2, RSP_REGISTER_S3, RSP_REGISTER_S4,
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RSP_REGISTER_S5, RSP_REGISTER_S6, RSP_REGISTER_S7,
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RSP_REGISTER_T8, RSP_REGISTER_T9, RSP_REGISTER_K0,
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RSP_REGISTER_K1, RSP_REGISTER_GP, RSP_REGISTER_SP,
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RSP_REGISTER_FP, RSP_REGISTER_RA,
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// CP0 registers.
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RSP_REGISTER_CP0_0, RSP_REGISTER_CP0_1, RSP_REGISTER_CP0_2,
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RSP_REGISTER_CP0_3, RSP_REGISTER_CP0_4, RSP_REGISTER_CP0_5,
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RSP_REGISTER_CP0_6, RSP_REGISTER_CP0_7,
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// Miscellanious registers.
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NUM_RSP_REGISTERS
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};
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enum sp_register {
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#define X(reg) reg,
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#include "rsp/registers.md"
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#undef X
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NUM_SP_REGISTERS,
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SP_REGISTER_OFFSET = RSP_REGISTER_CP0_0
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};
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#ifdef DEBUG_MMIO_REGISTER_ACCESS
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extern const char *sp_register_mnemonics[NUM_SP_REGISTERS];
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#endif
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struct rsp {
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struct bus_controller *bus;
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struct rsp_pipeline pipeline;
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struct rsp_cp2 cp2;
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uint32_t regs[NUM_RSP_REGISTERS];
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uint8_t mem[0x2000];
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// Instead of redecoding the instructions (there's only 256 words)
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// every cycle, we maintain a 256-word decoded instruction cache.
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struct rsp_opcode opcode_cache[0x1000 / 4];
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// TODO: Only for IA32/x86_64 SSE2; sloppy?
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struct dynarec_slab vload_dynarec;
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struct dynarec_slab vstore_dynarec;
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};
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cen64_cold int rsp_init(struct rsp *rsp, struct bus_controller *bus);
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cen64_cold void rsp_late_init(struct rsp *rsp);
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cen64_cold void rsp_destroy(struct rsp *rsp);
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cen64_flatten cen64_hot void rsp_cycle_(struct rsp *rsp);
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cen64_flatten cen64_hot static inline void rsp_cycle(struct rsp *rsp) {
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if (unlikely(rsp->regs[RSP_CP0_REGISTER_SP_STATUS] & SP_STATUS_HALT))
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return;
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rsp_cycle_(rsp);
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}
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#endif
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