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Try to reduce component cycle overheads.

Browse source 
Oftentimes, many of our countrollers are just doing a
simple countdown and don't perform any real work for the
cycle. Pull those parts out into headers so that the
compiler can 'see' that and optimize accordingly.
This commit is contained in:
Tyler J. Stachecki 2016-01-30 01:56:35 -05:00
parent 63b2709dc0
commit e2e72821e2
6 changed files with 27 additions and 13 deletions
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4
ai/controller.c
View file

@ -29,9 +29,7 @@ const char *ai_register_mnemonics[NUM_AI_REGISTERS] = {
static void ai_dma(struct ai_controller *ai);
// Advances the controller by one clock cycle.
void ai_cycle(struct ai_controller *ai) {
if (likely(ai->counter-- != 0))
return;
void ai_cycle_(struct ai_controller *ai) {
// DMA engine is finishing up with one entry.
if (ai->fifo_count > 0) {

8
ai/controller.h
View file

@ -46,7 +46,13 @@ struct ai_controller {
cen64_cold int ai_init(struct ai_controller *ai, struct bus_controller *bus,
bool no_interface);
cen64_flatten cen64_hot void ai_cycle(struct ai_controller *ai);
// Only invoke ai_cycle_ when the counter has expired (timeout).
void ai_cycle_(struct ai_controller *ai);
cen64_flatten cen64_hot static inline void ai_cycle(struct ai_controller *ai) {
if (unlikely(ai->counter-- == 0))
ai_cycle_(ai);
}
int read_ai_regs(void *opaque, uint32_t address, uint32_t *word);
int write_ai_regs(void *opaque, uint32_t address, uint32_t word, uint32_t dqm);

5
pi/controller.c
View file

@ -29,10 +29,9 @@ static int pi_dma_read(struct pi_controller *pi);
static int pi_dma_write(struct pi_controller *pi);
// Advances the controller by one clock cycle.
void pi_cycle(struct pi_controller *pi) {
if (likely(pi->counter-- != 0))
return;
void pi_cycle_(struct pi_controller *pi) {
// DMA engine is finishing up with one entry.
if (pi->bytes_to_copy > 0) {
uint32_t bytes = pi->bytes_to_copy;

8
pi/controller.h
View file

@ -64,7 +64,13 @@ cen64_cold int pi_init(struct pi_controller *pi, struct bus_controller *bus,
const uint8_t *rom, size_t rom_size, const struct save_file *sram,
const struct save_file *flashram);
cen64_flatten cen64_hot void ai_cycle(struct ai_controller *ai);
// Only invoke pi_cycle_ when the counter has expired (timeout).
void pi_cycle_(struct pi_controller *pi);
cen64_flatten cen64_hot static inline void pi_cycle(struct pi_controller *pi) {
if (unlikely(pi->counter-- == 0))
pi_cycle_(pi);
}
int read_cart_rom(void *opaque, uint32_t address, uint32_t *word);
int read_pi_regs(void *opaque, uint32_t address, uint32_t *word);

10
rsp/cpu.h
View file

@ -12,6 +12,7 @@
#define __rsp_cpu_h__
#include "common.h"
#include "os/dynarec.h"
#include "rsp/cp0.h"
#include "rsp/cp2.h"
#include "rsp/pipeline.h"
@ -70,7 +71,14 @@ cen64_cold int rsp_init(struct rsp *rsp, struct bus_controller *bus);
cen64_cold void rsp_late_init(struct rsp *rsp);
cen64_cold void rsp_destroy(struct rsp *rsp);
cen64_flatten cen64_hot void rsp_cycle(struct rsp *rsp);
cen64_flatten cen64_hot void rsp_cycle_(struct rsp *rsp);
cen64_flatten cen64_hot static inline void rsp_cycle(struct rsp *rsp) {
if (unlikely(rsp->regs[RSP_CP0_REGISTER_SP_STATUS] & SP_STATUS_HALT))
return;
rsp_cycle_(rsp);
}
#endif

5
rsp/pipeline.c
View file

@ -206,10 +206,7 @@ static inline void rsp_wb_stage(struct rsp *rsp) {
}
// Advances the processor pipeline by one clock.
void rsp_cycle(struct rsp *rsp) {
if (rsp->regs[RSP_CP0_REGISTER_SP_STATUS] & SP_STATUS_HALT)
return;
void rsp_cycle_(struct rsp *rsp) {
rsp_wb_stage(rsp);
rsp_df_stage(rsp);