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Author SHA1 Message Date
Tyler Stachecki a5f7925912 Add a temporary fix for buggy load/stores. 2014-04-19 08:06:07 -04:00
Tyler Stachecki ab4f705b35 Fix a bug with doubleword reads. 2014-04-18 23:36:05 -04:00
Tyler Stachecki b951f9ccf5 Start integrating interrupt support. 2014-04-18 22:59:48 -04:00
Tyler Stachecki 053d166b0c VR4300: Add support for the SLTIU instruction. 2014-04-18 22:24:43 -04:00
Tyler Stachecki 12935a4b97 VR4300: Add support for the SRA instruction. 2014-04-18 22:21:50 -04:00
Tyler Stachecki db4d11a225 VR4300: Add support for the DDIVU instruction. 2014-04-18 22:21:34 -04:00
Tyler Stachecki b7fe07049b VR4300: Add support for DSLL32, DSRA32 instructions. 2014-04-18 22:15:43 -04:00
Tyler Stachecki a5e2258026 VR4300: Add support for the DMULTU instruction. 2014-04-18 22:11:13 -04:00
Tyler Stachecki 1bd542d918 Wrap some unimplemented instructions in macros. 2014-04-18 22:03:49 -04:00
Tyler Stachecki 809cbe1eb5 Fix issues with loads, hack LD into the pipeline. 2014-04-18 22:03:00 -04:00
Tyler Stachecki 3276177460 Add some temporary placeholder functions. 2014-04-18 21:28:13 -04:00
Tyler Stachecki 9127d539f8 Add support for PI DMAs, correctly initialize RDRAM. 2014-04-18 21:15:38 -04:00
Tyler Stachecki 664731d298 Configure build system for maximum performance. 2014-04-18 21:12:58 -04:00
Tyler Stachecki e4104f4cea Implement RDRAM base reads and writes. 2014-04-18 18:14:49 -04:00
Tyler Stachecki 9feac3fe38 VR4300: Add support for SLT, SLTI instructions. 2014-04-18 17:52:07 -04:00
Tyler Stachecki 66f1d1a88d VR4300: Add support for J, JAL instructions. 2014-04-18 17:45:43 -04:00
Tyler Stachecki 3a126249c9 Allow PI to perform cartridge ROM reads. 2014-04-18 17:18:12 -04:00
Tyler Stachecki e605bcc232 Use similar length fields for MMIO register debug. 2014-04-18 17:17:26 -04:00
Tyler Stachecki 744e7ba269 Handle endian-ness at memory level, not in logic. 
Also fix buggy logic in PIF RAM read.
 2014-04-18 17:16:01 -04:00
Tyler Stachecki 13f0d2c9e5 Bus: Pass the correct instance to cart accessor. 2014-04-18 17:14:21 -04:00
Tyler Stachecki c96270e53a VR4300: Fix inconsistent spacing in pipeline.c. 2014-04-18 17:13:37 -04:00
Tyler Stachecki f22903b2ed VR4300: Initialize MI registers. 
Set MI_VERSION_REG and MI_INIT_MODE_REG at initialization time.
 2014-04-18 17:12:41 -04:00
Tyler Stachecki 93a9617641 Fix sign-extension issue in VR4300_SHRL. 2014-04-18 17:11:40 -04:00
Tyler Stachecki 644802b5ea Fix buggy mask operation in VR4300_JALR_JR. 2014-04-18 16:07:29 -04:00
Tyler Stachecki 9f1847ce29 Fix a access violation in pif_ram_read. 2014-04-18 15:17:34 -04:00
Tyler Stachecki 85356dbee5 VR4300: Add support for SLLV, SRLV instructions. 2014-04-18 15:14:03 -04:00
Tyler Stachecki 706c9c4462 VR4300: Add support for the SLTU instruction. 2014-04-18 15:08:33 -04:00
Tyler Stachecki 91f0b758fa VR4300: Add support for MF{HI,LO], MULT{,U} instructions. 2014-04-18 15:05:57 -04:00
Tyler Stachecki b3e5d94811 Implement external PIF RAM read/write. 2014-04-18 14:15:18 -04:00
Tyler Stachecki 80fdac1231 VR4300: Add support for SLL, SRL instructions. 2014-04-18 13:55:44 -04:00
Tyler Stachecki 9d2bbdfa9c Implement external SP mem read/write. 2014-04-18 13:41:29 -04:00
Tyler Stachecki 25a6ae8431 Mask bus writes to requested type, etc. 2014-04-18 13:34:23 -04:00
Tyler Stachecki 9098266156 VR4300: Add support for JALR, JR instructions. 2014-04-18 13:04:35 -04:00
Tyler Stachecki d114038a2b Add option for debugging MMIO register access. 2014-04-18 12:44:57 -04:00
Tyler Stachecki 4560adf7a7 Populate with interfaces and devices. 2014-04-18 11:24:43 -04:00
Tyler Stachecki 638a2eb490 Fix a lot of errors in the execution logic. 2014-04-17 21:30:44 -04:00
Tyler Stachecki ca81cc95f5 Start executing PIF ROM. 2014-03-09 22:38:47 -04:00
Tyler Stachecki 2f3aded155 Initial commit. 2014-03-08 11:12:15 -05:00