Commit graph

23 commits

Author SHA1 Message Date
Derek "Turtle" Roe
c4afd44ed7 See long description
Replaced all references to simulation with emulation
Updated copyright year
Updated .gitignore to reduce chances of random files being uploaded to
the repo
Added .gitattributes to normalize all text files, and to ignore binary
files (which includes the logo and the NEC PDF)
2015-07-03 08:18:16 -04:00
Tyler Stachecki
b80151069b Alignment/size optimizations. 2015-01-28 22:16:50 -05:00
Tyler Stachecki
b8481b0cd4 Unroll the top-level hot functions. 2015-01-22 14:31:25 -05:00
Tyler Stachecki
287e3370c5 Commit some MSVC-specific workarounds. 2014-12-31 16:20:53 -05:00
Tyler Stachecki
369d33c2d1 Windows fixes as reported by magumagu. 2014-12-07 10:40:42 -05:00
Tyler Stachecki
c1dc7cba08 Refactor for another major performance boost.
Since the CEN64 core now runs in it's own thread (and doesn't use
the FPU), we can steal the host's FPU state register and not have
to worry about preserving it.

Along with that major overhaul, don't force "extra" features like
simulation statistics and debugging if the user doesn't want them.
Including that code, even when it is not run, mucks with register
allocation or something ever so slightly.
2014-11-15 18:22:20 -05:00
Tyler Stachecki
31443e65c5 Mark another function as cen64_cold. 2014-11-14 22:22:00 -05:00
Tyler Stachecki
85654a891f Delay computing accurate value of count.
Instead, just bump the counter and don't track cycle count. When
it comes time to use count, shift it to the right by one instead.
2014-11-14 21:04:03 -05:00
Tyler Stachecki
e89f054674 Optimize extremely aggressively.
Tell GCC to optimize cold functions for size and stash them away in
a separate part of the binary. Put the simulate core, meanwhile, on
the hot path. Also, bump optimization to -O3 as we can now "afford"
to do so.
2014-11-05 08:39:47 -05:00
Tyler Stachecki
d45cab877a Add a -printsimstats switch.
Start working in a "extra" mode for debugging and other features
that we don't want on the main path. As a demonstration of what we
can do with this extra mode, print out a bunch of simulation info
that can help us optimize offline.
2014-10-27 19:25:22 -04:00
Tyler Stachecki
315a1220c7 Add a temporary fix to restore builds on MSVC. 2014-08-24 11:20:04 -04:00
Tyler Stachecki
e6bc8ebe64 Add more TLB support, verify things. 2014-08-23 20:06:45 -04:00
Tyler Stachecki
5f5d4da9a6 Commit preliminary (untested) TLB support. 2014-08-23 14:24:21 -04:00
Tyler Stachecki
bf46aa1fb3 Reorganize structures.
If we place larger, less commonly used structures after our
frequently accessed state variables, the average size of x86
instructions will be reduced due to the smaller offsets off
the base pointer.
2014-07-31 13:54:10 -04:00
Tyler Stachecki
9bd494b4e0 Make busy wait special casing safer. 2014-07-29 09:47:01 -04:00
Tyler Stachecki
e7417bee66 Add get/set native FPU state functions. 2014-07-27 23:40:08 -04:00
Tyler Stachecki
5dd0f5bc3c Add implementations for CFC1/CTC1. 2014-07-13 12:57:27 -04:00
Tyler Stachecki
656103920b VR4300: Start adding data cache support. 2014-05-06 19:49:03 -04:00
Tyler Stachecki
3bb8d496b4 Fix a slew of bugs in the pipeline. 2014-04-20 12:07:33 -04:00
Tyler Stachecki
91f0b758fa VR4300: Add support for MF{HI,LO], MULT{,U} instructions. 2014-04-18 15:05:57 -04:00
Tyler Stachecki
d114038a2b Add option for debugging MMIO register access. 2014-04-18 12:44:57 -04:00
Tyler Stachecki
ca81cc95f5 Start executing PIF ROM. 2014-03-09 22:38:47 -04:00
Tyler Stachecki
2f3aded155 Initial commit. 2014-03-08 11:12:15 -05:00