Emulation/cen64
1
0
Fork 0
mirror of https://github.com/n64dev/cen64.git synced 2025-04-02 10:31:54 -04:00
Code Issues Projects Releases Packages Wiki Activity
599 commits 6 branches 1 tag 5.4 MiB
Commit graph

130 commits

Author SHA1 Message Date
Derek "Turtle" Roe
c4afd44ed7 See long description 
Replaced all references to simulation with emulation
Updated copyright year
Updated .gitignore to reduce chances of random files being uploaded to
the repo
Added .gitattributes to normalize all text files, and to ignore binary
files (which includes the logo and the NEC PDF)
 2015-07-03 08:18:16 -04:00
Tyler J. Stachecki
5afe6c5f52 Various small optimizations. 2015-05-08 09:56:59 -04:00
Tyler Stachecki
b80151069b Alignment/size optimizations. 2015-01-28 22:16:50 -05:00
Tyler Stachecki
9b7a3c5fb5 Vectorize/inline/optimize CFC2. 2015-01-27 10:27:08 -05:00
Tyler Stachecki
b8481b0cd4 Unroll the top-level hot functions. 2015-01-22 14:31:25 -05:00
Tyler Stachecki
2b27a53f9d RSP: Fix opcode cache bug. 2015-01-13 17:58:18 -05:00
Tyler Stachecki
dc13f35e95 RSP: Add an opcode cache for performance. 2015-01-09 23:19:22 -05:00
Tyler Stachecki
fef231c067 RSP: Fix scalar load-use stall. 2015-01-09 15:29:44 -05:00
Tyler Stachecki
f279668999 RSP: Optimize memory requests slightly. 2015-01-09 14:44:01 -05:00
Tyler Stachecki
79ccec4ad4 RSP: Optimize decoder/stall checks slightly. 2015-01-09 13:53:20 -05:00
Tyler Stachecki
37dfe60542 Remove some hacks from the RSP pipeline. 2015-01-08 11:37:45 -05:00
Tyler Stachecki
94e8e37824 Add 64DD mappings and a controller. 2015-01-06 15:33:33 -05:00
Tyler Stachecki
9e7c0c5e82 Decoder optimization: drastically reduce size. 2015-01-06 11:40:11 -05:00
Tyler Stachecki
0e66d5d704 Remove an old, unused function. 2015-01-06 02:18:16 -05:00
Tyler Stachecki
4e8fb2329b Perform some really clever branch folding. 
Fold all the integer loads and stores into one code path.
 2015-01-06 02:14:40 -05:00
Tyler Stachecki
5229996ecd Trim off a few hundred bytes of code. 2015-01-05 23:00:49 -05:00
Tyler Stachecki
274d61e9ca Same as the last commit, but with the RSP. 2015-01-05 21:46:31 -05:00
Tyler Stachecki
5240b35d45 More cleanup of the fault/TLB code. 2015-01-04 15:37:47 -05:00
Tyler Stachecki
94efafe31b Fix the JALR RSP bug, similar to last commit. 2015-01-04 12:12:28 -05:00
Tyler Stachecki
9edd00f286 Remove old function definitions. 2015-01-02 23:55:28 -05:00
Tyler Stachecki
84d19566b9 Merge more functions together. 2015-01-02 23:51:20 -05:00
Tyler Stachecki
7262516636 Start merging RSP vector functions. 
No need to separate all these functions when they contain so
much common code, so start combining things for the sake of
locality and predictor effectiveness (and size). In addition
to these benefits, the CPU backend is usually busy during the
execution of these functions, so suffering a misprediction
isn't as painful (especially seeing as we can potentially
improve the prediction from the indirect branch).
 2015-01-02 22:17:41 -05:00
Tyler Stachecki
03663a68f6 Add an implementation for VMACU. 2015-01-02 20:52:39 -05:00
Tyler Stachecki
7a6ecabcc1 Fix a series of RSP bugs that krom pointed out. 2015-01-01 21:09:08 -05:00
Tyler Stachecki
6a709a4125 Get the Windows build in running condition. 2015-01-01 12:37:26 -05:00
Tyler Stachecki
6b19fd56c9 Fix RSP bug that arises on BREAK. 2014-12-31 10:19:59 -05:00
Tyler Stachecki
878521f54b Add register-caching version of VCH. 
Thanks go out to AIO for rounding out this commit with
his optimized SSE2 variant.
 2014-12-31 08:51:40 -05:00
Tyler Stachecki
31577f57e6 Enable register-caching on MinGW. 
Use a prelude to get around Microsoft's stupid calling convention.
 2014-12-30 11:37:08 -05:00
Tyler Stachecki
b4c83e8d4b Set initial values for VCC/VCO/VCE. 
Thanks, krom!
 2014-12-29 17:23:29 -05:00
Tyler Stachecki
86967b828e Actually enable the register caching... 
And fix a lot of bugs introduced with a regex.
 2014-12-27 17:32:57 -05:00
Tyler Stachecki
fb3c395277 Implement register-caching version of VLT. 2014-12-27 16:35:20 -05:00
Tyler Stachecki
ed1e354c68 Change RSP calling convention. 
pblendvb needs the mask in %xmm0, so change the calling convention
around just enough so we can cut out a movdqa from most instructions.
 2014-12-27 15:46:33 -05:00
Tyler Stachecki
9c43cf65ac Minor tweaks to VEQ/VNE register-cached versions. 2014-12-27 14:32:50 -05:00
Tyler Stachecki
c979744c1a Implement register-caching versions of VGE. 2014-12-27 13:16:15 -05:00
Tyler Stachecki
8915df71d8 Implement register-caching versions of VEQ/VNE. 2014-12-27 12:19:31 -05:00
Tyler Stachecki
ef997fe107 Prepare to register-cache RSP flags. 2014-12-27 10:55:31 -05:00
Tyler Stachecki
41eba75bc7 Register-caching variations of bitwise functions. 2014-12-27 10:13:53 -05:00
Tyler Stachecki
2efca0d94c Implement register-caching versions of VABS. 2014-12-27 09:45:03 -05:00
Tyler Stachecki
c1f4ddd911 Fix MFC2/MTC2 odd-element byte indexing. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
574c85ad37 Add some missing flag clears to VCL. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
8f17a516bc Fix a stray memory copy. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
3a969b2379 Do some general cleanup/optimization. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
b740c9a5b3 Optimize RSP CP2 register transfers. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
fea458e70c Add (partial) implementations for LPV/LUV/SPV/SUV. 
Also, cleanup other SSSE3+ accelerated loads and stores.
 2014-12-26 14:19:45 -05:00
Tyler Stachecki
03f04c1b82 Add implementation for MTC2. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
9f9e3ebf80 Sort out a pair of RSP bugs. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
b33f2800ae Add implementation for MFC2. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
824131db6b Use a union for RSP vectors to force alignment. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
dc008abe77 Fix more show-stopping RSP bugs. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
173815ed63 Another bug: make sure memory requests get filled. 2014-12-26 14:19:45 -05:00