Derek "Turtle" Roe
c4afd44ed7
See long description
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Replaced all references to simulation with emulation
Updated copyright year
Updated .gitignore to reduce chances of random files being uploaded to
the repo
Added .gitattributes to normalize all text files, and to ignore binary
files (which includes the logo and the NEC PDF)
2015-07-03 08:18:16 -04:00
Tyler Stachecki
e89f054674
Optimize extremely aggressively.
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Tell GCC to optimize cold functions for size and stash them away in
a separate part of the binary. Put the simulate core, meanwhile, on
the hot path. Also, bump optimization to -O3 as we can now "afford"
to do so.
2014-11-05 08:39:47 -05:00
Tyler Stachecki
b20b138d99
Add the RSP opcode entries.
2014-10-18 11:32:27 -04:00
Tyler Stachecki
971bcd131b
Prevent namespace collisions.
2014-09-04 13:45:57 -04:00
Tyler Stachecki
17010317ab
Implement SDL/SDR.
2014-08-31 11:59:52 -04:00
Tyler Stachecki
0d15bd9ddc
Add some preliminary input support.
2014-08-27 23:13:08 -04:00
Tyler Stachecki
e6bc8ebe64
Add more TLB support, verify things.
2014-08-23 20:06:45 -04:00
Tyler Stachecki
c7e09f90bd
Add enough support for libdragon to run.
2014-08-23 16:25:35 -04:00
Tyler Stachecki
5f5d4da9a6
Commit preliminary (untested) TLB support.
2014-08-23 14:24:21 -04:00
Tyler Stachecki
2b94264a92
Pass IW to each opcode function.
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Instead of having almost every opcode function load IW off the
stack through the VR4300 pointer, just pass it as an argument on
the stack to reduce binary size and hoist a load up.
Thanks go out to Narann for this idea.
2014-08-22 07:54:53 -04:00
Tyler Stachecki
7116582a6b
Combine more execution functions.
2014-08-03 13:42:08 -04:00
Tyler Stachecki
26908fb00e
Combine some execution functions.
2014-08-03 03:46:33 -04:00
Tyler Stachecki
2ad431aaee
Reduce VR4300/CP1 overhead.
2014-07-31 11:30:06 -04:00
Tyler Stachecki
9c4fecc2e0
Add VR4300 busy wait detection feature.
2014-07-29 09:27:20 -04:00
Tyler Stachecki
596736f64d
Hack in support for LDL/LDR.
2014-07-27 00:59:43 -04:00
Tyler Stachecki
705b8330fa
Fix bcopy() and memcpy()-related bugs.
2014-07-26 10:45:16 -04:00
Tyler Stachecki
349bdc1684
Merge krom's FPU comparison instructions.
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Implements: C.F.D, C.F.S, C.NGE.D, C.NGE.S, C.NGL.D, C.NGL.S
C.NGLE.D, C.NGLE.S, C.NGT.D, C.NGT.S, C.OLE.C.OLE.S, C.OLE.S,
C.OLT.D, C.OLT.S, C.SEQ.D, C.SEQ.S, C.SF.`C.SF.S, C.SF.S,
C.UEQ.D, C.UEQ.S, C.ULE.D, C.ULE.S, C.ULT.D, C.ULT.S, C.UN.D
C.UN.S.
2014-07-17 20:03:28 -04:00
Tyler Stachecki
4b69669998
Add support for C.lt.fmt.
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Conflicts:
vr4300/cp1.h
2014-07-13 13:16:31 -04:00
Tyler Stachecki
2bfd3870e8
Implement another conditional FPU operation.
2014-07-13 13:01:40 -04:00
Tyler Stachecki
16aea90110
Implement FPU conditional branches.
2014-07-13 13:01:31 -04:00
Tyler Stachecki
24c17acb62
Implement a FPU conditional operation.
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Conflicts:
vr4300/cp1.c
vr4300/cp1.h
2014-07-13 13:01:19 -04:00
Tyler Stachecki
c652f8359a
Merge krom's FPU instructions.
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Implements: ABS.D, ABS.S, CEIL.L.D, CEIL.L.S, CEIL.W.D
CEIL.W.S, FLOOR.L.D, FLOOR.L.S, FLOOR.W.D, FLOOR.W.S, NEG.D
NEG.S, ROUND.L.D, ROUND.L.S, ROUND.W.D, ROUND.W.S, SQRT.D
SQRT.S, TRUNC.L.D, and TRUNC.L.S!
2014-07-08 00:00:25 -04:00
Tyler Stachecki
0734d6b4e4
Add support for MOV.fmt and SUB.fmt.
2014-07-04 17:53:07 -04:00
Tyler Stachecki
33322f0870
Add support for CVT.l.fmt, CVT.w.fmt.
2014-07-04 14:20:20 -04:00
Tyler Stachecki
8debccc73e
Add SDC1, CP1 comment fixes.
2014-07-04 13:52:56 -04:00
Tyler Stachecki
a88f03f045
Fix a LWC1 dependency issue.
2014-07-04 13:41:29 -04:00
Tyler Stachecki
31d9f611d1
Implement a handful of CP1 instructions.
2014-07-04 13:17:32 -04:00
Tyler Stachecki
92887871f0
Forward CP1 registers in EX logic.
2014-07-04 11:01:25 -04:00
Tyler Stachecki
d71cc95a0d
Add CP1 instructions to decoder logic.
2014-07-02 23:08:36 -04:00
Tyler Stachecki
691d3009e4
Housekeeping: Move CP0/CP1 functions around.
2014-07-02 21:43:07 -04:00
Tyler Stachecki
c11f271348
Add initial MTC1 implementation.
2014-07-02 00:05:42 -04:00
Tyler Stachecki
e8d7ece375
Add initial LDC1 implementation, fix LWC1 entry.
2014-07-01 23:58:43 -04:00
Tyler Stachecki
084d3ed853
vr4300: Add support for several instructions.
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Thanks go out to krom for the work in this commit.
Instructions added: DADD, DSUB, DADDI, DADDIU, DADDU, DSUBU,
DDIV, DMULT, DSLL, DSLLV, DSRA, DSRAV, DSRL, DSRLV, DSRL32 NOR.
Signed-off-by: Tyler Stachecki <tstache1@binghamton.edu>
2014-06-24 19:54:09 -04:00
Tyler Stachecki
45a06d3532
Allow instructions to raise exceptions, add some CP1.
2014-05-20 22:16:12 -04:00
Tyler Stachecki
9ae2fdbcf8
Start integrating data cache into DC stage.
2014-05-10 15:21:55 -04:00
Tyler Stachecki
d5170999d5
VR4300: Add support for SRAV instruction.
2014-04-21 14:02:13 -04:00
Tyler Stachecki
bce0070159
VR4300: Add support for LWL, LWR instructions.
2014-04-21 13:55:09 -04:00
Tyler Stachecki
99d5eea419
VR4300: Add support for SWL, SWR instructions.
2014-04-20 13:21:08 -04:00
Tyler Stachecki
91f098991f
VR4300: Add support for DIV, DIVU instructions.
2014-04-20 08:02:13 -04:00
Tyler Stachecki
ad1076c794
VR4300: Add support for the SD instruction.
2014-04-19 15:58:13 -04:00
Tyler Stachecki
d498ac07e2
VR4300: Improve decoder, add ERET instruction.
2014-04-19 14:54:08 -04:00
Tyler Stachecki
10503b750f
VR4300: Add support for the MT{HI,LO} instructions.
2014-04-19 08:14:44 -04:00
Tyler Stachecki
053d166b0c
VR4300: Add support for the SLTIU instruction.
2014-04-18 22:24:43 -04:00
Tyler Stachecki
12935a4b97
VR4300: Add support for the SRA instruction.
2014-04-18 22:21:50 -04:00
Tyler Stachecki
db4d11a225
VR4300: Add support for the DDIVU instruction.
2014-04-18 22:21:34 -04:00
Tyler Stachecki
b7fe07049b
VR4300: Add support for DSLL32, DSRA32 instructions.
2014-04-18 22:15:43 -04:00
Tyler Stachecki
a5e2258026
VR4300: Add support for the DMULTU instruction.
2014-04-18 22:11:13 -04:00
Tyler Stachecki
809cbe1eb5
Fix issues with loads, hack LD into the pipeline.
2014-04-18 22:03:00 -04:00
Tyler Stachecki
3276177460
Add some temporary placeholder functions.
2014-04-18 21:28:13 -04:00
Tyler Stachecki
9feac3fe38
VR4300: Add support for SLT, SLTI instructions.
2014-04-18 17:52:07 -04:00
