Commit graph

12 commits

Author SHA1 Message Date
Derek "Turtle" Roe
c4afd44ed7 See long description
Replaced all references to simulation with emulation
Updated copyright year
Updated .gitignore to reduce chances of random files being uploaded to
the repo
Added .gitattributes to normalize all text files, and to ignore binary
files (which includes the logo and the NEC PDF)
2015-07-03 08:18:16 -04:00
Tyler Stachecki
9b7a3c5fb5 Vectorize/inline/optimize CFC2. 2015-01-27 10:27:08 -05:00
Tyler Stachecki
7a6ecabcc1 Fix a series of RSP bugs that krom pointed out. 2015-01-01 21:09:08 -05:00
Tyler Stachecki
b4c83e8d4b Set initial values for VCC/VCO/VCE.
Thanks, krom!
2014-12-29 17:23:29 -05:00
Tyler Stachecki
3f2329be5b Fix a bug in VRCP/VRSQ precision selection. 2014-12-22 21:06:17 -05:00
Tyler Stachecki
4b6904240e Add implementations for VRCP, VRCPL, and VRCPH. 2014-12-22 20:29:16 -05:00
Tyler Stachecki
316214d82d (Finally) permit SSE2-only builds.
Add SSE2 codepaths where necessary (even if not complete), while
still allowing the project to be compiled with SSSE3+ intrinsics.
2014-11-10 14:29:13 -05:00
Tyler Stachecki
e89f054674 Optimize extremely aggressively.
Tell GCC to optimize cold functions for size and stash them away in
a separate part of the binary. Put the simulate core, meanwhile, on
the hot path. Also, bump optimization to -O3 as we can now "afford"
to do so.
2014-11-05 08:39:47 -05:00
Tyler Stachecki
f520f6e9b8 Start fleshing out the RSP pipeline. 2014-10-18 11:33:04 -04:00
Tyler Stachecki
7ac625cec1 Implement RSP DMAs, COP0 registers, etc. 2014-10-18 11:32:51 -04:00
Tyler Stachecki
d114038a2b Add option for debugging MMIO register access. 2014-04-18 12:44:57 -04:00
Tyler Stachecki
4560adf7a7 Populate with interfaces and devices. 2014-04-18 11:24:43 -04:00