mirror of
https://github.com/SourMesen/Mesen2.git
synced 2025-04-02 10:21:44 -04:00
193 lines
No EOL
7.2 KiB
JSON
193 lines
No EOL
7.2 KiB
JSON
{
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"instructions": [
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{
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"op": "sxy",
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"name": "SXY - Swap X and Y",
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"description": "The contents of the X and Y registers are swapped."
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},
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{
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"op": "sax",
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"name": "SAX - Swap A and X",
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"description": "The contents of the A and X registers are swapped."
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},
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{
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"op": "say",
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"name": "SAY - Swap A and Y",
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"description": "The contents of the X and Y registers are swapped."
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},
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{
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"op": "cla",
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"name": "CLA - Clear A",
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"description": "Clears the accumulator."
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},
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{
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"op": "clx",
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"name": "CLX - Clear X",
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"description": "Clears the X register."
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},
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{
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"op": "cly",
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"name": "CLY - Clear Y",
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"description": "Clears the Y register."
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},
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{
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"op": "st0",
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"name": "ST0 - Store VDC 0",
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"description": "Writes the immediate value to the VDC's address register (AR)"
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},
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{
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"op": "st1",
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"name": "ST1 - Store VDC 1",
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"description": "Writes the immediate value to the VDC's selected register (LSB)"
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},
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{
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"op": "st2",
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"name": "ST2 - Store VDC 2",
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"description": "Writes the immediate value to the VDC's selected register (MSB)"
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},
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{
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"op": "tma",
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"name": "TMA - Transfer MPR to A",
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"description": "Transfers the value of the selected MPR register (immediate value) to A."
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},
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{
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"op": "tam",
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"name": "TMA - Transfer A to MPR",
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"description": "The accumulator's content is copied to the selected MPR registers (based on set bits in immediate value)"
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},
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{
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"op": "tst",
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"name": "TST - Test memory",
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"description": "The content of the memory address is ANDed with the immediate value. Flags are updated based on result.",
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"flags": ["Overflow", "Negative", "Zero"]
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},
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{
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"op": "tii",
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"name": "TII - Transfer Block Data",
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"description": "Transfers block data based on the source, destination and length operands. Source and destination address are incremented after each byte."
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},
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{
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"op": "tdd",
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"name": "TDD - Transfer Block Data",
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"description": "Transfers block data based on the source, destination and length operands. Source and destination address are decremented after each byte."
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},
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{
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"op": "tin",
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"name": "TIN - Transfer Block Data",
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"description": "Transfers block data based on the source, destination and length operands. Source is incremented after each byte. Destination is fixed."
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},
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{
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"op": "tia",
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"name": "TIA - Transfer Block Data",
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"description": "Transfers block data based on the source, destination and length operands. Source is incremented after each byte. Destination is incremented and then decremented (alternates between 2 addresses.)"
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},
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{
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"op": "tai",
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"name": "TAI - Transfer Block Data",
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"description": "Transfers block data based on the source, destination and length operands. Source is incremented and then decremented (alternates between 2 addresses). Destination is incremented after each byte. "
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},
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{
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"op": "tsb",
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"name": "TSB - Test and Set Bit",
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"description": "The memory value is ORed with the content of A and the flags are updated based on the result.",
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"flags": ["Zero", "Negative", "Overflow"]
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},
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{
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"op": "trb",
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"name": "TRB - Test and Reset Bit",
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"description": "The memory value is ANDed with the complement of A (~A) and the flags are updated based on the result.",
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"flags": ["Zero", "Negative", "Overflow"]
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},
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{
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"op": "bsr",
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"name": "BSR - Branch Subroutine",
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"description": "Branch to the specified address. PC is pushed onto the stack."
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},
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{
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"op": "bra",
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"name": "BRA - Branch Always",
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"description": "Branch to the specified address."
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},
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{
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"op": "csl",
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"name": "CSL - Clock Speed Low",
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"description": "Sets the CPU's clock speed to ~1.79MHz."
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},
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{
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"op": "csh",
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"name": "CSH - Clock Speed High",
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"description": "Sets the CPU's clock speed to ~7.16MHz."
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},
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{
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"op": "set",
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"name": "SET - Set T",
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"description": "Sets the memory flag (T).",
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"flags": ["Memory"]
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},
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{
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"op": "rmb",
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"name": "RMBi - Reset Memory Bit",
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"description": "Clears the specified bit at the zero page address."
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},
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{
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"op": "smb",
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"name": "SMBi - Set Memory Bit",
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"description": "Sets the specified bit at the zero page address."
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},
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{
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"op": "bbr",
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"name": "BBRi - Branch on Bit Reset",
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"description": "Branch if the specified bit at the zero page address is clear."
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},
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{
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"op": "bbs",
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"name": "BBSi - Branch on Bit Set",
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"description": "Branch if the specified bit at the zero page address is set."
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},
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{
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"op": "stz",
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"name": "STZ - Store Zero",
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"description": "Stores the value 0 into memory."
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},
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{
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"op": "phx",
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"name": "PHX - Push X register",
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"description": "Pushes the value of the X register to the stack."
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},
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{
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"op": "plx",
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"name": "PLX - Pull X register",
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"description": "Pulls a byte from the stack and stores it into the X register.",
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"flags": ["Zero", "Negative"]
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},
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{
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"op": "phy",
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"name": "PHY - Push Y register",
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"description": "Pushes the value of the Y register to the stack."
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},
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{
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"op": "ply",
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"name": "PLY - Pull Y register",
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"description": "Pulls a byte from the stack and stores it into the Y register.",
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"flags": ["Zero", "Negative"]
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}
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],
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"addressingModes": [
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"Imm", "IndX", "Imp", "Imm", "Zero", "Zero", "Zero", "Zero", "Imp", "Imm", "Acc", "Imp", "Abs", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "Imm", "Zero", "ZeroX", "ZeroX", "Zero", "Imp", "AbsY", "Imp", "Imp", "Abs", "AbsX", "AbsX", "ZeroRel",
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"Abs", "IndX", "Imp", "Imm", "Zero", "Zero", "Zero", "Zero", "Imp", "Imm", "Acc", "Imp", "Abs", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "Imp", "ZeroX", "ZeroX", "ZeroX", "Zero", "Imp", "AbsY", "Imp", "Imp", "AbsX", "AbsX", "AbsX", "ZeroRel",
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"Imp", "IndX", "Imp", "Imm", "Rel", "Zero", "Zero", "Zero", "Imp", "Imm", "Acc", "Imp", "Abs", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "Imm", "Imp", "ZeroX", "ZeroX", "Zero", "Imp", "AbsY", "Imp", "Imp", "Imp", "AbsX", "AbsX", "ZeroRel",
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"Imp", "IndX", "Imp", "Imp", "Zero", "Zero", "Zero", "Zero", "Imp", "Imm", "Acc", "Imp", "Ind", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "Block", "ZeroX", "ZeroX", "ZeroX", "Zero", "Imp", "AbsY", "Imp", "Imp", "AbsXInd", "AbsX", "AbsX", "ZeroRel",
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"Rel", "IndX", "Imp", "ImZero", "Zero", "Zero", "Zero", "Zero", "Imp", "Imm", "Imp", "Imp", "Abs", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "ImAbs", "ZeroX", "ZeroX", "ZeroY", "Zero", "Imp", "AbsY", "Imp", "Imp", "Abs", "AbsX", "AbsX", "ZeroRel",
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"Imm", "IndX", "Imm", "ImZeroX", "Zero", "Zero", "Zero", "Zero", "Imp", "Imm", "Imp", "Imp", "Abs", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "ImAbsX", "ZeroX", "ZeroX", "ZeroY", "Zero", "Imp", "AbsY", "Imp", "Imp", "AbsX", "AbsX", "AbsY", "ZeroRel",
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"Imm", "IndX", "Imp", "Block", "Zero", "Zero", "Zero", "Zero", "Imp", "Imm", "Imp", "Imp", "Abs", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "Block", "Imp", "ZeroX", "ZeroX", "Zero", "Imp", "AbsY", "Imp", "Imp", "Imp", "AbsX", "AbsX", "ZeroRel",
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"Imm", "IndX", "Imp", "Block", "Zero", "Zero", "Zero", "Zero", "Imp", "Imm", "Imp", "Imp", "Abs", "Abs", "Abs", "ZeroRel",
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"Rel", "IndY", "ZInd", "Block", "Imp", "ZeroX", "ZeroX", "Zero", "Imp", "AbsY", "Imp", "Imp", "Imp", "AbsX", "AbsX", "ZeroRel"
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]
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} |