mirror of
https://github.com/SourMesen/Mesen2.git
synced 2025-04-02 10:21:44 -04:00
595 lines
No EOL
17 KiB
C++
595 lines
No EOL
17 KiB
C++
#include "pch.h"
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#include "Gameboy/Gameboy.h"
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#include "Gameboy/GbMemoryManager.h"
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#include "Gameboy/GbPpu.h"
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#include "Gameboy/GbCpu.h"
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#include "Gameboy/APU/GbApu.h"
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#include "Gameboy/GbTimer.h"
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#include "Gameboy/GbTypes.h"
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#include "Gameboy/Carts/GbCart.h"
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#include "Gameboy/GbDmaController.h"
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#include "Gameboy/GbControlManager.h"
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#include "Shared/Emulator.h"
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#include "Shared/EmuSettings.h"
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#include "Shared/CheatManager.h"
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#include "Shared/MessageManager.h"
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#include "SNES/Coprocessors/SGB/SuperGameboy.h"
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#include "SNES/SnesControlManager.h"
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#include "SNES/Input/SnesController.h"
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#include "Utilities/VirtualFile.h"
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#include "Utilities/Serializer.h"
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#include "Utilities/HexUtilities.h"
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#include "Shared/MemoryOperationType.h"
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void GbMemoryManager::Init(Emulator* emu, Gameboy* gameboy, GbCart* cart, GbPpu* ppu, GbApu* apu, GbTimer* timer, GbDmaController* dmaController)
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{
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_highRam = gameboy->DebugGetMemory(MemoryType::GbHighRam);
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_emu = emu;
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_cpu = gameboy->GetCpu();
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_apu = apu;
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_ppu = ppu;
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_gameboy = gameboy;
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_cart = cart;
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_timer = timer;
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_dmaController = dmaController;
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_controlManager = (GbControlManager*)gameboy->GetControlManager();
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_settings = _emu->GetSettings();
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memset(_reads, 0, sizeof(_reads));
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memset(_writes, 0, sizeof(_writes));
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_state = {};
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_state.CgbWorkRamBank = 1;
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_state.DisableBootRom = false;
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MapRegisters(0x8000, 0x9FFF, RegisterAccess::ReadWrite);
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MapRegisters(0xFE00, 0xFFFF, RegisterAccess::ReadWrite);
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_cart->InitCart();
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RefreshMappings();
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}
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GbMemoryManager::~GbMemoryManager()
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{
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}
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GbMemoryManagerState& GbMemoryManager::GetState()
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{
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return _state;
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}
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void GbMemoryManager::RefreshMappings()
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{
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int wramBank = _ppu->IsCgbEnabled() ? std::max<int>(1, _state.CgbWorkRamBank) : 1;
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Map(0xC000, 0xCFFF, GbMemoryType::WorkRam, 0, false);
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Map(0xD000, 0xDFFF, GbMemoryType::WorkRam, wramBank * 0x1000, false);
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Map(0xE000, 0xEFFF, GbMemoryType::WorkRam, 0, false);
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Map(0xF000, 0xFFFF, GbMemoryType::WorkRam, wramBank * 0x1000, false);
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_cart->RefreshMappings();
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if(!_state.DisableBootRom) {
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Map(0x0000, 0x00FF, GbMemoryType::BootRom, 0, true);
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if(_gameboy->IsCgb()) {
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Map(0x0200, 0x08FF, GbMemoryType::BootRom, 0x200, true);
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}
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}
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}
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void GbMemoryManager::ExecTimerDmaSerial()
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{
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_state.ApuCycleCount += _state.CgbHighSpeed ? 1 : 2;
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_timer->Exec();
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if((_cpu->GetState().CycleCount & 0x03) == 0) {
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_dmaController->Exec();
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}
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if(_state.SerialBitCount && (_cpu->GetState().CycleCount & 0x1FF) == 0) {
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_state.SerialData = (_state.SerialData << 1) | 0x01;
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if(--_state.SerialBitCount == 0) {
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//"It will be notified that the transfer is complete in two ways:
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//SC's Bit 7 will be cleared"
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_state.SerialControl &= 0x7F;
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//"and the Serial Interrupt handler will be called"
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RequestIrq(GbIrqSource::Serial);
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}
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}
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}
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void GbMemoryManager::ExecMasterCycle()
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{
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uint64_t& cycleCount = _cpu->GetState().CycleCount;
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cycleCount++;
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if(cycleCount & 1) {
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ExecTimerDmaSerial();
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}
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_ppu->Exec<true>();
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}
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void GbMemoryManager::Exec()
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{
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uint64_t& cycleCount = _cpu->GetState().CycleCount;
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cycleCount += 2;
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ExecTimerDmaSerial();
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_ppu->Exec<false>();
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}
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void GbMemoryManager::MapRegisters(uint16_t start, uint16_t end, RegisterAccess access)
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{
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for(int i = start; i < end; i += 0x100) {
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_state.IsReadRegister[i >> 8] = ((int)access & (int)RegisterAccess::Read) != 0;
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_state.IsWriteRegister[i >> 8] = ((int)access & (int)RegisterAccess::Write) != 0;
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}
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}
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void GbMemoryManager::Map(uint16_t start, uint16_t end, GbMemoryType type, uint32_t offset, bool readonly)
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{
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uint8_t* src = _gameboy->DebugGetMemory((MemoryType)type);
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uint32_t size = _gameboy->DebugGetMemorySize((MemoryType)type);
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if(size > 0) {
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while(offset >= size) {
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offset -= size;
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}
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src += offset;
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for(int i = start; i < end; i += 0x100) {
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_reads[i >> 8] = src;
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_writes[i >> 8] = readonly ? nullptr : src;
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_state.MemoryType[i >> 8] = type;
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_state.MemoryOffset[i >> 8] = offset;
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_state.MemoryAccessType[i >> 8] = readonly ? RegisterAccess::Read : RegisterAccess::ReadWrite;
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if(src) {
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src += 0x100;
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offset = (offset + 0x100);
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if(offset >= size) {
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offset = 0;
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src = _gameboy->DebugGetMemory((MemoryType)type);
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}
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}
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}
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} else {
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Unmap(start, end);
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}
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}
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void GbMemoryManager::Unmap(uint16_t start, uint16_t end)
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{
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for(int i = start; i < end; i += 0x100) {
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_reads[i >> 8] = nullptr;
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_writes[i >> 8] = nullptr;
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_state.MemoryType[i >> 8] = GbMemoryType::None;
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_state.MemoryOffset[i >> 8] = 0;
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_state.MemoryAccessType[i >> 8] = RegisterAccess::None;
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}
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}
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template<MemoryOperationType opType, GbOamCorruptionType oamCorruptionType>
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uint8_t GbMemoryManager::Read(uint16_t addr)
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{
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uint8_t value = 0;
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if(_dmaController->IsOamDmaRunning()) {
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addr = _dmaController->ProcessOamDmaReadConflict(addr);
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}
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if(_state.IsReadRegister[addr >> 8]) {
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_ppu->ProcessOamCorruption<oamCorruptionType>(addr);
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value = ReadRegister(addr);
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} else if(_reads[addr >> 8]) {
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value = _reads[addr >> 8][(uint8_t)addr];
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}
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if(_emu->GetCheatManager()->HasCheats<CpuType::Gameboy>()) {
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_emu->GetCheatManager()->ApplyCheat<CpuType::Gameboy>(addr, value);
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}
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_emu->ProcessMemoryRead<CpuType::Gameboy>(addr, value, opType);
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return value;
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}
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bool GbMemoryManager::IsOamDmaRunning()
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{
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return _dmaController->IsOamDmaRunning();
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}
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void GbMemoryManager::WriteDma(uint16_t addr, uint8_t value)
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{
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_emu->ProcessMemoryRead<CpuType::Gameboy>(addr, value, MemoryOperationType::DmaWrite);
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_ppu->WriteOam((uint8_t)addr, value, true);
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}
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uint8_t GbMemoryManager::ReadDma(uint16_t addr)
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{
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uint8_t value = 0;
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if(_reads[addr >> 8]) {
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value = _reads[addr >> 8][(uint8_t)addr];
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} else if(addr >= 0x8000 && addr <= 0x9FFF) {
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value = ReadRegister(addr);
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}
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_emu->ProcessMemoryRead<CpuType::Gameboy>(addr, value, MemoryOperationType::DmaRead);
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return value;
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}
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template<MemoryOperationType type>
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void GbMemoryManager::Write(uint16_t addr, uint8_t value)
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{
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if(_emu->ProcessMemoryWrite<CpuType::Gameboy>(addr, value, type)) {
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if(_dmaController->IsOamDmaRunning() && _dmaController->IsOamDmaConflict(addr)) {
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//DMA conflict, can't write
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return;
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}
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if(_state.IsWriteRegister[addr >> 8]) {
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_ppu->ProcessOamCorruption<GbOamCorruptionType::Write>(addr);
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WriteRegister(addr, value);
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} else if(_writes[addr >> 8]) {
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_writes[addr >> 8][(uint8_t)addr] = value;
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}
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}
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}
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uint8_t GbMemoryManager::DebugRead(uint16_t addr)
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{
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if(_state.IsReadRegister[addr >> 8]) {
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return PeekRegister(addr);
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} else {
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uint8_t* ptr = _reads[addr >> 8];
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if(ptr) {
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return ptr[(uint8_t)addr];
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}
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}
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return 0;
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}
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void GbMemoryManager::DebugWrite(uint16_t addr, uint8_t value)
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{
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if(_state.IsWriteRegister[addr >> 8]) {
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//Do not write to registers via debug tools
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} else {
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uint8_t* ptr = _writes[addr >> 8];
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if(ptr) {
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ptr[(uint8_t)addr] = value;
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}
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}
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}
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uint8_t* GbMemoryManager::GetMappedBlock(uint16_t addr)
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{
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if(_reads[addr >> 8]) {
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return _reads[addr >> 8];
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}
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return nullptr;
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}
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uint8_t GbMemoryManager::PeekRegister(uint16_t addr)
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{
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//Peek on oam/vram to avoid triggering the invalid oam/vram access break options
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if(addr >= 0xFF40) {
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if(_gameboy->IsCgb() && (addr == 0xFF76 || addr == 0xFF77)) {
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//Avoid calling Run() on APU when debugger reads CGB-only APU registers
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return _apu->PeekCgbRegister(addr);
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}
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return ReadRegister(addr);
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} else if(addr >= 0xFE00 && addr <= 0xFE9F) {
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return _ppu->PeekOam((uint8_t)addr);
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} else if(addr >= 0xFF10 && addr <= 0xFF3F) {
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return _apu->Peek(addr);
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} else if(addr >= 0x8000 && addr <= 0x9FFF) {
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return _ppu->PeekVram(addr);
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} else {
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//Avoid side effects
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return 0xFF;
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}
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}
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uint8_t GbMemoryManager::ReadRegister(uint16_t addr)
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{
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if(addr >= 0xFF00) {
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if(addr == 0xFFFF) {
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return _state.IrqEnabled; //IE - Interrupt Enable (R/W)
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} else if(addr == 0xFF46) {
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return _dmaController->Read();
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} else if(addr >= 0xFF80) {
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return _highRam[addr & 0x7F]; //80-FE
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} else if(addr >= 0xFF4C) {
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if(_gameboy->IsCgb()) {
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switch(addr) {
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//FF4D - KEY1 - CGB Mode Only - Prepare Speed Switch
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case 0xFF4D:
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if(_ppu->IsCgbEnabled()) {
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return (
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(_state.CgbHighSpeed ? 0x80 : 0) |
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(_state.CgbSwitchSpeedRequest ? 0x01 : 0) |
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0x7E
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);
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}
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return 0xFF;
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case 0xFF55: //CGB - DMA
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return _ppu->IsCgbEnabled() ? _dmaController->ReadCgb(addr) : 0xFF;
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case 0xFF56:
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//TODO CGB - RP Infrared port
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return _state.CgbRegRpInfrared | 0x3E;
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case 0xFF4F: //CGB - VRAM bank
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case 0xFF68: case 0xFF69: case 0xFF6A: case 0xFF6B: //CGB - Palette
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return _ppu->ReadCgbRegister(addr);
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//FF70 - SVBK - CGB Mode Only - WRAM Bank
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case 0xFF70: return _ppu->IsCgbEnabled() ? (_state.CgbWorkRamBank | 0xF8) : 0xFF;
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case 0xFF72: return _state.CgbRegFF72;
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case 0xFF73: return _state.CgbRegFF73;
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case 0xFF74:
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if(_ppu->IsCgbEnabled()) {
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return _state.CgbRegFF74;
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}
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return 0xFF;
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case 0xFF75: return _state.CgbRegFF75 | 0x8F;
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case 0xFF76: case 0xFF77:
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return _apu->ReadCgbRegister(addr);
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}
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}
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LogDebug("[Debug] GB - Missing read handler: $" + HexUtilities::ToHex(addr));
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return 0xFF; //4C-7F, open bus
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} else if(addr >= 0xFF40) {
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return _ppu->Read(addr); //40-4B
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} else if(addr >= 0xFF10) {
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return _apu->Read(addr); //10-3F
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} else {
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//00-0F
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switch(addr) {
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case 0xFF00:
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_controlManager->SetInputReadFlag();
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return _controlManager->ReadInputPort();
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case 0xFF01: return _state.SerialData; //SB - Serial transfer data (R/W)
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case 0xFF02: return _state.SerialControl | (_gameboy->IsCgb() ? 0x7C : 0x7E); //SC - Serial Transfer Control (R/W)
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case 0xFF04: case 0xFF05: case 0xFF06: case 0xFF07:
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return _timer->Read(addr);
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case 0xFF0F: return _state.IrqRequests | 0xE0; //IF - Interrupt flags (R/W)
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default: return 0xFF; //Open bus
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}
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}
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} else if(addr >= 0xFE00) {
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return _ppu->ReadOam((uint8_t)addr);
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} else if(addr >= 0x8000 && addr <= 0x9FFF) {
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return _ppu->ReadVram(addr);
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}
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return _cart->ReadRegister(addr);
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}
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void GbMemoryManager::WriteRegister(uint16_t addr, uint8_t value)
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{
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if(addr >= 0xFF00) {
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if(addr == 0xFFFF) {
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_state.IrqEnabled = value; //IE register
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} else if(addr == 0xFF46) {
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_dmaController->Write(value);
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} else if(addr >= 0xFF80) {
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_highRam[addr & 0x7F] = value; //80-FE
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} else if(addr >= 0xFF4C) {
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//4C-7F
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if(addr == 0xFF50) {
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if(value & 0x01) {
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_state.DisableBootRom = true;
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RefreshMappings();
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}
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} else if(_gameboy->IsCgb()) {
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switch(addr) {
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case 0xFF4D:
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//FF4D - KEY1 - CGB Mode Only - Prepare Speed Switch
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if(_ppu->IsCgbEnabled()) {
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_state.CgbSwitchSpeedRequest = (value & 0x01) != 0;
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}
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break;
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case 0xFF51: case 0xFF52: case 0xFF53: case 0xFF54: case 0xFF55: //CGB - DMA
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if(_ppu->IsCgbEnabled()) {
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_dmaController->WriteCgb(addr, value);
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}
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break;
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case 0xFF56:
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//TODO CGB - RP Infrared port
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if(_ppu->IsCgbEnabled()) {
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_state.CgbRegRpInfrared = value & 0xC1;
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}
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break;
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case 0xFF4C: //CGB - "LCDMODE", set by boot rom to turn off CGB features for the LCD for DMG games
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if(!_state.DisableBootRom) {
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_ppu->WriteCgbRegister(addr, value);
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}
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break;
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case 0xFF4F: //CGB - VRAM banking
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case 0xFF68: case 0xFF69: case 0xFF6A: case 0xFF6B: //CGB - Palette
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_ppu->WriteCgbRegister(addr, value);
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break;
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case 0xFF70:
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//FF70 - SVBK - CGB Mode Only - WRAM Bank
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if(_ppu->IsCgbEnabled()) {
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_state.CgbWorkRamBank = value & 0x07;
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RefreshMappings();
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}
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break;
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case 0xFF72: _state.CgbRegFF72 = value; break;
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case 0xFF73: _state.CgbRegFF73 = value; break;
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case 0xFF74:
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if(_ppu->IsCgbEnabled()) {
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_state.CgbRegFF74 = value;
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}
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break;
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case 0xFF75: _state.CgbRegFF75 = value; break;
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default:
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LogDebug("[Debug] GBC - Missing write handler: $" + HexUtilities::ToHex(addr));
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break;
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}
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}
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} else if(addr >= 0xFF40) {
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_ppu->Write(addr, value); //40-4B
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} else if(addr >= 0xFF10) {
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_apu->Write(addr, value); //10-3F
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} else {
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//00-0F
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switch(addr) {
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case 0xFF00: _controlManager->WriteInputPort(value); break;
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case 0xFF01: _state.SerialData = value; break; //FF01 - SB - Serial transfer data (R/W)
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case 0xFF02:
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//FF02 - SC - Serial Transfer Control (R/W)
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_state.SerialControl = value & (_gameboy->IsCgb() ? 0x83 : 0x81);
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if((_state.SerialControl & 0x80) && (_state.SerialControl & 0x01)) {
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_state.SerialBitCount = 8;
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} else {
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_state.SerialBitCount = 0;
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}
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break;
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case 0xFF04: case 0xFF05: case 0xFF06: case 0xFF07:
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_timer->Write(addr, value);
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break;
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case 0xFF0F: _state.IrqRequests = value & 0x1F; break; //IF - Interrupt flags (R/W)
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}
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}
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} else if(addr >= 0xFE00) {
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_ppu->WriteOam((uint8_t)addr, value, false);
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} else if(addr >= 0x8000 && addr <= 0x9FFF) {
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_ppu->WriteVram(addr, value);
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} else {
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_cart->WriteRegister(addr, value);
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}
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}
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void GbMemoryManager::ProcessCpuWrite(uint16_t addr, uint8_t value)
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{
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if((addr & 0xFFC0) != 0xFF40) {
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Exec();
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Exec();
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Write(addr, value);
|
|
return;
|
|
}
|
|
|
|
//Special cases for LCD registers reads/writes where effects
|
|
//need to be triggered a bit earlier than other writes
|
|
switch(addr) {
|
|
default:
|
|
//Default case, same write timing as all other writes
|
|
Exec();
|
|
Exec();
|
|
Write(addr, value);
|
|
break;
|
|
|
|
case 0xFF47:
|
|
//BGP writes appear to be effective slightly earlier than other writes?
|
|
//This allows the ppu_scanline_bgp and m3_bgp_change tests to display properly
|
|
ExecMasterCycle();
|
|
ExecMasterCycle();
|
|
ExecMasterCycle();
|
|
Write(addr, value);
|
|
ExecMasterCycle();
|
|
break;
|
|
|
|
case 0xFF40:
|
|
//LCDC - For GBC, clearing bit 4 (tile select) causes a glitch if done at the same time as
|
|
//the BG fetcher is loading tile data (either the LSB or MSB). When this bug is triggered,
|
|
//the tile data is replaced with the tile index (loaded at the first step of the fetching process)
|
|
//This needs to be triggered before running the last dot to get the correct result (cgb-acid-hell test)
|
|
Exec();
|
|
Exec();
|
|
if(_gameboy->IsCgb() && (_ppu->GetState().Control & 0x10) && !(value & 0x10)) {
|
|
//Trigger GBC fetch glitch at the same time as the write occurs
|
|
_ppu->SetTileFetchGlitchState();
|
|
}
|
|
Write(addr, value);
|
|
break;
|
|
}
|
|
}
|
|
|
|
void GbMemoryManager::RequestIrq(uint8_t source)
|
|
{
|
|
_state.IrqRequests |= source;
|
|
}
|
|
|
|
void GbMemoryManager::ClearIrqRequest(uint8_t source)
|
|
{
|
|
_state.IrqRequests &= ~source;
|
|
}
|
|
|
|
uint8_t GbMemoryManager::ProcessIrqRequests()
|
|
{
|
|
uint8_t irqsToProcess = _state.IrqRequests & _state.IrqEnabled;
|
|
if(irqsToProcess) {
|
|
if(irqsToProcess & GbIrqSource::VerticalBlank) {
|
|
return GbIrqSource::VerticalBlank;
|
|
} else if(irqsToProcess & GbIrqSource::LcdStat) {
|
|
return GbIrqSource::LcdStat;
|
|
} else if(irqsToProcess & GbIrqSource::Timer) {
|
|
return GbIrqSource::Timer;
|
|
} else if(irqsToProcess & GbIrqSource::Serial) {
|
|
return GbIrqSource::Serial;
|
|
} else if(irqsToProcess & GbIrqSource::Joypad) {
|
|
return GbIrqSource::Joypad;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void GbMemoryManager::ToggleSpeed()
|
|
{
|
|
_state.CgbSwitchSpeedRequest = false;
|
|
_state.CgbHighSpeed = !_state.CgbHighSpeed;
|
|
}
|
|
|
|
bool GbMemoryManager::IsHighSpeed()
|
|
{
|
|
return _state.CgbHighSpeed;
|
|
}
|
|
|
|
bool GbMemoryManager::IsBootRomDisabled()
|
|
{
|
|
return _state.DisableBootRom;
|
|
}
|
|
|
|
uint64_t GbMemoryManager::GetApuCycleCount()
|
|
{
|
|
return _state.ApuCycleCount;
|
|
}
|
|
|
|
void GbMemoryManager::Serialize(Serializer& s)
|
|
{
|
|
SV(_state.DisableBootRom); SV(_state.IrqEnabled); SV(_state.IrqRequests);
|
|
SV(_state.ApuCycleCount); SV(_state.CgbHighSpeed); SV(_state.CgbSwitchSpeedRequest); SV(_state.CgbWorkRamBank);
|
|
SV(_state.SerialData); SV(_state.SerialControl); SV(_state.SerialBitCount);
|
|
SV(_state.CgbRegFF72); SV(_state.CgbRegFF73); SV(_state.CgbRegFF74); SV(_state.CgbRegFF75);
|
|
SV(_state.CgbRegRpInfrared);
|
|
|
|
if(!s.IsSaving()) {
|
|
RefreshMappings();
|
|
}
|
|
}
|
|
|
|
template uint8_t GbMemoryManager::Read<MemoryOperationType::Read, GbOamCorruptionType::Read>(uint16_t addr);
|
|
template uint8_t GbMemoryManager::Read<MemoryOperationType::Read, GbOamCorruptionType::ReadIncDec>(uint16_t addr);
|
|
template uint8_t GbMemoryManager::Read<MemoryOperationType::ExecOpCode, GbOamCorruptionType::Read>(uint16_t addr);
|
|
template uint8_t GbMemoryManager::Read<MemoryOperationType::ExecOpCode, GbOamCorruptionType::ReadIncDec>(uint16_t addr);
|
|
template uint8_t GbMemoryManager::Read<MemoryOperationType::ExecOperand, GbOamCorruptionType::ReadIncDec>(uint16_t addr);
|
|
template uint8_t GbMemoryManager::Read<MemoryOperationType::DmaRead, GbOamCorruptionType::Read>(uint16_t addr);
|
|
template void GbMemoryManager::Write<MemoryOperationType::Write>(uint16_t addr, uint8_t value);
|
|
template void GbMemoryManager::Write<MemoryOperationType::DmaWrite>(uint16_t addr, uint8_t value); |