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Author SHA1 Message Date
CocoSimone
23bdd74f8a reduce branching in emulation of CPU/RSP parallelization 2022-12-12 02:47:16 +01:00
CocoSimone
30a0a43d08 avoid building rapidjson (from discord-rpc) docs, examples and tests 2022-12-12 02:46:14 +01:00
CocoSimone
bbcc453ae2 DPI awareness, TODO: handle moving to different monitors 2022-12-09 05:40:32 +01:00
CocoSimone
da25baccad update parallel-rdp and enable lto 2022-12-09 01:44:06 +01:00
CocoSimone
ad68b1c7d0 update mario.png 2022-12-06 22:10:53 +01:00
CocoSimone
3b3015e846 Discord Rich Presence! 2022-12-06 22:06:52 +01:00
CocoSimone
1d5aa43f9c update dependencies and discord-rpc 2022-12-06 21:02:57 +01:00
CocoSimone
1aeddbfc9f Don't use virtual class for different type of cpu core 2022-12-06 20:51:37 +01:00
CocoSimone
f6824eaa4f rename emulator 2022-11-19 22:26:43 +01:00
Simone Coco
c04ed9a20d rename emulator 2022-11-18 02:48:21 +01:00
CocoSimone
35b4d5ab9e preliminary dynarec work 2022-11-03 12:39:51 +01:00
CocoSimone
1265279069 minor fixes 2022-10-30 15:33:53 +01:00
CocoSimone
6222e9ebfd attempting to fix CI builds once again 2022-10-29 14:42:55 +02:00
CocoSimone
c40668e604 attempting to fix Windows build once again 2022-10-29 12:13:14 +02:00
CocoSimone
3b86d92f2e this build will fail 2022-10-29 01:04:19 +02:00
CocoSimone
3b843e23d5 this build will fail 2022-10-29 01:02:58 +02:00
CocoSimone
eb39588b62 Trying to fix build on Windows 2022-10-26 22:34:05 +02:00
CocoSimone
d15add0505 Try to use vcpkg in CI 2022-10-26 21:07:48 +02:00
CocoSimone
69dbacf43d Minor fixes 2022-10-25 21:56:43 +02:00
CocoSimone
487160b198 Scheduler (SI DMA delay) 2022-10-21 19:02:44 +02:00
Simone Coco
eadb4594f5 TLBWR + Scheduler (SI DMA delay) 2022-10-21 16:49:52 +02:00
CocoSimone
a8fda9770c Delay SI DMAs, implement TAS movie replay (WIP), and fix DIV 2022-10-18 20:46:45 +02:00
CocoSimone
6a42a212c4 Remove memory editor 2022-10-18 12:26:07 +02:00
CocoSimone
7305aff4ed Static linking 2022-10-18 11:40:00 +02:00
CocoSimone
af198a2d3a Static linking 2022-10-17 22:57:29 +02:00
CocoSimone
6510dbf3ac Fixed some more RSP instructions, fix CI (hopefully) 2022-10-17 22:35:30 +02:00
Simone Coco
2dca6a5116 Embed SM64 "Press Start" screenshot in README 2022-10-17 10:03:39 +02:00
CocoSimone
7aa019fac1 Fixed a bunch of the RSP, now Mario 64 correctly shows graphcis 2022-10-16 23:07:25 +02:00
CocoSimone
932275ab32 Couple RDP fixes and some other stuff i forgor 💀 2022-10-16 21:37:48 +02:00
CocoSimone
fc6642554c Introduce memory editor and fix crash on dumping RDRAM 2022-10-12 01:46:22 +02:00
Simone Coco
eafebc4c28 Reset RSP steps on BREAK 2022-10-11 11:47:49 +02:00
CocoSimone
0ac6f07054 fix nasty bug on writing to RSP PC. Mario Kart 64 boots now 2022-10-10 23:35:14 +02:00
CocoSimone
db4e2caf85 fix isviewer + rsp reset divin, divout and divinloaded 2022-10-07 00:32:53 +02:00
CocoSimone
6d9516933d fix decoding rsp 2022-10-06 18:30:04 +02:00
CocoSimone
73d65c2246 SSV and SLV switched, fix shift in SBV, implement "Dump RDRAM" and "Dump IMEM" buttons in GUI 2022-10-06 02:17:36 +02:00
Simone Coco
89daa969eb VRSQ + VNAND + fix "Paused" in window title 2022-10-05 17:21:03 +02:00
Simone Coco
4757cbb8ef cycle counting fixed 2022-10-05 12:09:31 +02:00
Simone Coco
80c8718fef SUPER MARIO 64 BOOTS, works until peach letter 2022-10-05 11:22:04 +02:00
CocoSimone
1f0448fed5 buncha rsp instructions 2022-10-05 01:11:34 +02:00
CocoSimone
76c81bc43d Bug in RDP gathering of commands + 2 new vector instructions 2022-10-04 21:55:33 +02:00
CocoSimone
130d34ae91 oops forgor break 2022-10-03 22:25:44 +02:00
Simone Coco
c8f3cb0cb0
Update MI.cpp 2022-10-03 10:22:00 +02:00
CocoSimone
b79c869415 Add support for different CIC chips 2022-10-01 14:45:43 +02:00
CocoSimone
38b5b4d430 Fix some VU instructions and TODO VADD 2022-10-01 04:55:59 +02:00
CocoSimone
3ff64c04fe Stub "RDRAM size" value in RDRAM to fix bug described in previous commit message 2022-10-01 04:23:09 +02:00
CocoSimone
770339f84e SW in Lemmy's suite with Krom's IPL3 loops infinitely due to throwing exception that shouldn't happen 2022-10-01 03:48:31 +02:00
CocoSimone
a711093b55 clamping logic + sdr fix + rsp.status gets written the same way as RSP::Write on RSP::MTC0 2022-09-25 22:02:31 +02:00
CocoSimone
c0fa20b10f Moar RSP vector instructions 2022-09-25 18:27:07 +02:00
CocoSimone
24ec6ed6dd Fire RSP DMAs upon RSP MTC0 to indexes 2 or 3 (unstucks Mario) 2022-09-25 14:55:21 +02:00
CocoSimone
6ad8d00a92 More FPU exceptions 2022-09-24 20:41:54 +02:00