switch-coreboot/src/southbridge
Aaron Durbin 81409d4602 UPSTREAM: chromeos chipsets: select RTC usage
Since RTC is now a Kconfig ensure RTC is selected on the
x86 chipsets which are in Chrome OS devices. This allows
the eventlog to have proper timestamps instead of all
zeros.

BUG=chrome-os-partner:55993
BRANCH=None
TEST=None

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16086
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

Change-Id: I24ae7d9b3bf43a5791d4dc04aae018ce17fda72b
Reviewed-on: https://chromium-review.googlesource.com/368280
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-13 01:03:18 -07:00
..
amd UPSTREAM: sb/amd/sb700: Do not reset fifo after skipping the sent bytes 2016-08-11 20:39:59 -07:00
broadcom tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
intel UPSTREAM: chromeos chipsets: select RTC usage 2016-08-13 01:03:18 -07:00
nvidia UPSTREAM: Add newlines at the end of all coreboot files 2016-08-05 11:45:17 -07:00
ricoh/rl5c476 southbridge/ricoh: Update license headers 2016-04-13 17:35:43 +02:00
sis/sis966 UPSTREAM: sis/sis966: fix typo 2016-08-04 23:37:50 -07:00
ti southbridge/ti: Update license headers 2016-04-13 17:36:00 +02:00
via UPSTREAM: Documentation: Fix doxygen errors 2016-07-12 22:34:45 -07:00