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UPSTREAM: sis/sis966: fix typo

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temp8 & (!0x10) == temp8 & 0 == 0, which is certainly not intended.

BUG=None
BRANCH=None
TEST=None

Change-Id: Ief29a561995c3baf8ac5584c74e12de979791ea9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1229587
Reviewed-on: https://review.coreboot.org/15961
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/366281
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Patrick Georgi 2016-07-29 18:23:32 +02:00 • committed by chrome-bot
parent 585f7292f6
commit 275352cc46
1 changed files with 1 additions and 1 deletions
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2
src/southbridge/sis/sis966/early_smbus.c
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@ -578,7 +578,7 @@ static void sis_init_stage1(void)
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761), 0); //Disable Internal GUI enable bit
temp8 = pci_read_config8(dev, 0x4C);
GUI_En = temp8 & 0x10;
pci_write_config8(dev, 0x4C, temp8 & (!0x10));
pci_write_config8(dev, 0x4C, temp8 & (~0x10));
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761_PCIE), 0);
i=0;