switch-coreboot/superio/winbond/w83627thg/dts
Myles Watson 7c14a50c1c This patch makes all the SuperIOs build again, and reverts some breakage that
I introduced earlier.

It adds a placeholder in the fintek SuperIO so the array indexing works.
It moves the enable to make the struct more compatible with v2.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1066 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-12-08 20:40:02 +00:00

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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
{
device_operations = "w83627thg_ops";
/* To override any of these, put the over-ride in mainboard dts. */
/* Floppy */
floppyenable = "0";
floppyio = "0x3f0";
floppyirq = "6";
floppydrq = "2";
/* Parallel port */
ppenable = "0";
ppio = "0x378";
ppirq = "7";
ppdrq = "4";
/* COM1 */
com1enable = "0";
com1io = "0x3f8";
com1irq = "4";
/* COM2 */
com2enable = "0";
com2io = "0x2f8";
com2irq = "3";
/* PS/2 keyboard + PS/2 mouse */
kbenable = "0";
kbio = "0x60";
kbio2 = "0x64";
kbirq = "1";
kbirq2 = "12";
/* Game port, MIDI port, GPIO1, GPIO5 */
gameenable = "0";
gameio = "0x201";
gameio2 = "0x330";
gameirq = "9";
/* GPIO2 */
gpio2enable = "0";
/* GPIO3, GPIO4 */
gpio34enable = "0";
/* ACPI */
acpienable = "0";
/* Hardware Monitor */
hwmenable = "0";
hwmio = "0x290";
hwmirq = "5";
};