switch-coreboot/util/lar
Marc Jones 5917206641 Cache the ROM to speed up stage2 and payload decompression.
Due to some problems with PCI transactions, Geode LX needs the ROM cache properties to be write-serialize + cache disabled by runtime. More details below.

Add mainboard_pre_payload() call to each mainboard as the final coreboot function before the payload is called by stage1.

Note that this patch also grows the bootblock from 16K to 20K to make room for mainboard_pre_payload().

"The problem is a transaction depth issue and bottlenecks inside the GX
and LX that go across PCI.  The conditions are very complicated but it
comes down to we need write serialization for writes to PCI. If you
look in the data book you can't have write serialization and the cache
enabled on a given area. During coreboot we don't have to worry about
a write or a PCI bus master so I think we can enable caching the ROM.
After coreboot we can't be sure what will happen in the system so we
need to set it up to be safe. For example flashrom just clears the
write protect bit. If the cache were enabled (no write serialization)
and flashrom was writing the ROM we would be in a precarious position.
A PCI  bus master doing a read or a write that has a hit on a tag
would cause enough bottleneck conditions that it might hit the bug. We
could change flashrom but that doesn't help other tools. We need to
leave the system in a safe state. Also, caching the ROM after it is no
longer used doesn't make much sense. So, we need a call just before
the payload runs to clean up the system."

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@573 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-02-06 02:36:50 +00:00
..
bootblock.c Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
example.c Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
lar.c Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
lar.h Cache the ROM to speed up stage2 and payload decompression. 2008-02-06 02:36:50 +00:00
lib.c Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
lib.h Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
Makefile Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
README Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
stream.c Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00

Lightweight Archiver: lar
-----------------------

Table of Contents
  - Introduction
  - Usage
  - Archive format
  - TODO
  - Copyright and License


Introduction
------------

This is a simple archiver, similar to cpio, ar or tar. It was designed and
written for coreboot.

Design goals were
  - minimum overhead
  - maximum fault tolerance
  - simplicity

For a usage example see example.c.

For questions contact Stefan Reinauer <stepan@coresystems.de>.


Usage
-----

Create archive archive.lar containing files file1 ... fileN:

  $ lar c archive.lar file1 ... fileN

Extract files from archive.lar:

  $ lar x archive.lar [file1 ... fileN]

List files in archive:

  $ lar l archive.lar


Archive format
--------------

The rough format is:

 |--------------|
 | header       |
 |--------------|
 | data         |
 |--------------|
 | header       |
 |--------------|
 | data         |
 |--------------|
  ...

Headers have to be 16 byte aligned.

 |----------------------------|
 | magic (8 bytes)            |
 |----------------------------|
 | length (4 bytes)           |
 |----------------------------|
 | checksum (4 bytes)         |
 |----------------------------|
 | offset to blob (4 bytes)   |
 |----------------------------|
 | "path name"                | <-- null terminated, aligned to 16 bytes
 |----------------------------|
 | blob (aligned to 16 bytes) |
 |----------------------------|


TODO
----

  - Reading flash layouts
  - This does not enforce any alignment yet
  - Alignment enforcing will be optional


Copyright and License
---------------------

Copyright (C) 2006-2007 coresystems GmbH
Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; version 2 of the License.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA

Note: The files lar.h and example.c are dual-licensed. You can choose between:
 - The GNU GPL, version 2, as published by the Free Software Foundation.
 - The revised BSD license (without advertising clause). See lar.h.