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https://github.com/fail0verflow/switch-coreboot.git
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54b7a9609f
Resource map and a way to use the pci config stuff from stage 1, done in a way that will work in stage 2 (but only for systems that use type 1 config cycles; will fail for type MEM config cycles). We need to rethink the PCI config stuff per Stepan's comment, in part because the device tree now includes things that are NOT PCI devices. Stepan's suggestion, to make the functions take busdevfn as the parameter, makes a lot of sense. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.s git-svn-id: svn://coreboot.org/repository/coreboot-v3@720 f3766cd6-281f-0410-b1cd-43a5c92072e9 |
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| .. | ||
| amd/k8 | ||
| arch | ||
| amd_geodelx.h | ||
| byteorder.h | ||
| cpu.h | ||
| div64.h | ||
| io.h | ||
| legacy.h | ||
| macros.h | ||
| msr.h | ||
| mtrr.h | ||
| pci_ops.h | ||
| pciconf.h | ||
| pirq_routing.h | ||
| swab.h | ||
| types.h | ||