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https://github.com/fail0verflow/switch-coreboot.git
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38f2e9cfe3
$(obj)/coreboot_ap -> $(objcbfs)/coreboot_ap.elf It is really a ramstage for AP CPU and not a romstage, it is not enabled for any mainboard by default, and it doesn't compile even if enabled. Change-Id: Ifb9c5cb6df65309660b000876cf6a9a3da9b6839 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/840 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
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| .. | ||
| arch/x86 | ||
| boot | ||
| console | ||
| cpu | ||
| devices | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| pc80 | ||
| southbridge | ||
| superio | ||
| vendorcode | ||
| Kconfig | ||
| Kconfig.deprecated_options | ||