switch-coreboot/mainboard
Ronald G. Minnich 5a90884bd4 last kontron commit.
This is a potentially good pointer to where someone can take this. 

While startup was working, BSP now explodes once the AP stops, while
BSP is doing startup IPI loop send #2. The code needs to be hardened; I 
think use of the shared variables would really make it much more solid. 
This would be a good undergrad student project if someone is looking for one.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1145 f3766cd6-281f-0410-b1cd-43a5c92072e9
2009-03-11 16:17:37 +00:00
..
adl cs5536: Remove redundant enable_ide variable from ide device. 2009-01-09 18:12:08 +00:00
amd Add AP detection to stage0 to prevent APs from re-initializing mainboard setup 2009-02-10 22:41:35 +00:00
amp cs5536: Remove redundant enable_ide variable from ide device. 2009-01-09 18:12:08 +00:00
artecgroup cs5536: Make NAND code optional and implement timing setting 2009-02-23 18:42:44 +00:00
emulation This patch should serve as a porting help for other northbridges for the new resource allocator. 2008-12-31 20:00:30 +00:00
gigabyte Add AP detection to stage0 to prevent APs from re-initializing mainboard setup 2009-02-10 22:41:35 +00:00
jetway This patch fixes a few small problems and gets cn700 to read from an IDE 2008-12-23 23:44:39 +00:00
kontron last kontron commit. 2009-03-11 16:17:37 +00:00
pcengines cs5536: Remove redundant enable_ide variable from ide device. 2009-01-09 18:12:08 +00:00
via Kill off stage1_mtrr.c completely, and bring in mtrr.c for stage2 from v2. 2008-12-23 19:02:44 +00:00
Kconfig Make C7/CN700 boot to memtest86, and pass that test. Booting is very slow, ~15min to get to a memtest 2008-12-17 21:17:01 +00:00