mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
2beb0a1bcc
- Code to initialize sdram from C on the l440gx - cache as ram code fro the p6 it works except conflict misses occur with addresses that are not cached so writing to ram does not work. Which makes it to brittle to count on. - Initial implementation of a fallback booting scheme where we can have two copies of linuxbios in rom at once. - Movement of 32 bit entry code from entry16.inc to entry32.inc - Update of all config files so they now also include entry32.inc - Fix for start_stop.c & entry16.inc so I can fairly arbitrarily relocate the 16bit entry code in SMP. - A small number of fixes for warnings
47 lines
1.1 KiB
Text
47 lines
1.1 KiB
Text
arch i386
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mainboardinit cpu/i386/entry16.inc
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mainboardinit cpu/i386/entry32.inc
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ldscript cpu/i386/entry16.lds
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mainboardinit cpu/i386/reset16.inc
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ldscript cpu/i386/reset16.lds
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option SERIAL_SUPERIO_BASEADDRESS=0x370
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mainboardinit superio/winbond/w83977ef/setup_serial.inc
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mainboardinit pc80/serial.inc
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mainboardinit arch/i386/lib/console.inc
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northbridge intel/440bx
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southbridge intel/piix4e
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mainboardinit cpu/p6/earlymtrr.inc
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#superio NSC/pc87309
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nsuperio winbond/w83977ef keyboard=1
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nsuperio winbond/w83877tf
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option ENABLE_FIXED_AND_VARIABLE_MTRRS
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option MTRR_ONLY_TOP_64K_FLASH
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option PIIX4_DEVFN=0x38
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option NO_KEYBOARD
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option HAVE_PIRQ_TABLE
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option ZKERNEL_START=0xfffc0000
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option ZKERNEL_MASK=0x7f
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# For those people who use DoC
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# on DoC on this board, Linux starts at the front. No need to have
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# linuxbios in DoC as it is in FLASH
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# Actually we'll leave it at the 65K offset. The reason to leave it there
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# is we can drop any LinuxBIOS DoC in from any machine and it will work
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# fine.
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# option DOC_KERNEL_START 0
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option DOC_MIL_BASE=0xd0000
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option L440BX
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object mainboard.o
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object irq_tables.o
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option UPDATE_MICROCODE
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cpu p6
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cpu p5
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