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https://github.com/fail0verflow/switch-coreboot.git
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coreboot for the Switch
- Code to initialize sdram from C on the l440gx - cache as ram code fro the p6 it works except conflict misses occur with addresses that are not cached so writing to ram does not work. Which makes it to brittle to count on. - Initial implementation of a fallback booting scheme where we can have two copies of linuxbios in rom at once. - Movement of 32 bit entry code from entry16.inc to entry32.inc - Update of all config files so they now also include entry32.inc - Fix for start_stop.c & entry16.inc so I can fairly arbitrarily relocate the 16bit entry code in SMP. - A small number of fixes for warnings |
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Documentation | ||
HOWTO | ||
romimages | ||
src | ||
util | ||
.cvsignore | ||
AUTHORS | ||
ChangeLog | ||
NEWS | ||
README |
This is FreeBIOS. At this point it's really linuxbios, FreeBIOS is mostly gone. To see how to build a target, you should look into the HOWTO directory. We should, but do not, have a HOWTO for each target. Sorry, Ron's fault. But the SIS 630 is a good place to start. To make this you need a newer GAS. Our version that works is GNU assembler version 2.9.5 (i386-redhat-linux) using BFD version 2.9.5.0.22 This comes with redhat 6.2 or later. Almost everybody has this now.