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https://github.com/fail0verflow/switch-coreboot.git
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9eb8578b75
This includes using consistent (C) lines, adding email addresses, and so on. The file southbridge/nvidia/mcp55/dts was never edited by Yinghai Lu (thus removing his (C) line) and would be too trivial anyway... The changes (though trivial) were also informally acked by Ron on IRC. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@744 f3766cd6-281f-0410-b1cd-43a5c92072e9
57 lines
2 KiB
C
57 lines
2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2000 Ollie Lo, Silicon Integrated Systems
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* Copyright (C) 2008 Ronald G. Minnich <rminnich@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef ARCH_PIRQ_ROUTING_H
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#define ARCH_PIRQ_ROUTING_H
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#include <types.h>
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#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
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#define PIRQ_VERSION 0x0100
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struct irq_info {
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u8 bus, devfn; /* Bus, device and function */
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struct {
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u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
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u16 bitmap; /* Available IRQs */
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} __attribute__((packed)) irq[4];
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u8 slot; /* Slot number, 0=onboard */
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u8 rfu;
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} __attribute__((packed));
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struct irq_routing_table {
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u32 signature; /* PIRQ_SIGNATURE should be here */
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u16 version; /* PIRQ_VERSION */
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u16 size; /* Table size in bytes */
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u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
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u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
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u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
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u32 miniport_data; /* Crap */
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u8 rfu[11];
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u8 checksum; /* Modulo 256 checksum must give zero */
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struct irq_info slots[];
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} __attribute__((packed));
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extern const struct irq_routing_table intel_irq_routing_table;
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unsigned long copy_pirq_routing_table(unsigned long start);
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unsigned long write_pirq_routing_table(unsigned long start);
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#endif /* ARCH_PIRQ_ROUTING_H */
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