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https://github.com/fail0verflow/switch-coreboot.git
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6220b632e7
- I left LB_TAG_ intact because they are used by the payloads - file renames are still missing. see next commit - some lb_ renames might be missing. feel free to provide patches. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
39 lines
1.3 KiB
C
39 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Datasheet:
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* - Name: 82C54 CHMOS Programmable Interval Timer
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* - PDF: http://www.intel.com/design/archives/periphrl/docs/23124406.pdf
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* - Order number: 231244-006
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*
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* See also:
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* - http://en.wikipedia.org/wiki/Intel_8253
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*/
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#define I82C54_CONTROL_WORD_REGISTER 0x43 /* Write-only! */
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#define I82C54_COUNTER0 0x40
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#define I82C54_COUNTER1 0x41
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#define I82C54_COUNTER2 0x42
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void setup_i8259(void);
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void uart_init(void);
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void rtc_init(int invalid);
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void isa_dma_init(void);
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