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032a81eb9c
It requires a flag (CONFIG_SCAN_BUILD) to be set, and then $ scan-build make Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1146 f3766cd6-281f-0410-b1cd-43a5c92072e9
247 lines
6.7 KiB
Text
247 lines
6.7 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2006 Ronald G. Minnich <rminnich@gmail.com>
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## Copyright (C) 2006 Segher Boessenkool <segher@kernel.crashing.org>
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## Copyright (C) 2006-2007 Uwe Hermann <uwe@hermann-uwe.de>
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## Copyright (C) 2006-2007 coresystems GmbH
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## (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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#
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# For a description of the syntax of this configuration file,
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# see http://lxr.linux.no/source/Documentation/kbuild/kconfig-language.txt.
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#
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mainmenu "coreboot configuration"
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menu "General setup"
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config EXPERIMENTAL
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bool "Prompt for development and/or incomplete code/mainboards"
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help
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Enable this option if you want to test development features or
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incomplete/unsupported mainboards.
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We do not make any guarantees about anything that is marked
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as EXPERIMENTAL! You have been warned!
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config EXPERT
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bool "Expert mode"
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help
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This allows you to select certain advanced configuration options.
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It is mainly intended for coreboot developers.
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Warning: Only enable this option if you really know what you're
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doing! You have been warned!
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config LOCALVERSION
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string "Local version - append to coreboot release"
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help
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Append an extra string to the end of the coreboot version.
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config OPTION_TABLE
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bool "CMOS Option Table"
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default y
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help
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This option is used to determine whether the mainboard has
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a battery backed up real time clock with CMOS NVRAM, or if you want
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to use it.
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config BEEPS
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bool "Enable beeps upon certain coreboot events"
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depends EXPERT
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default n
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help
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Enable this option to make coreboot beep upon certain events.
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config WHOLE_PROGRAM_COMPILE
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bool "Enable whole-program optimizations (DANGEROUS)"
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depends EXPERT && EXPERIMENTAL
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help
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Enable 'gcc -fwhole-program -combine' for select code.
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Needs lots of annotation in stage1 and stage2.
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Works for initram only.
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This increases compile time (no parallel compilation possible
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anymore) and compiler memory usage (up to a factor of 20) and
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makes debugging really hard.
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Requires at least gcc 4.2.x, but miscompilations may occur.
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Say No.
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If you are a Gentoo user, say NO!
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config SCAN_BUILD
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bool "Use clang's scan-build utility for static analysis"
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depends EXPERT && EXPERIMENTAL && !WHOLE_PROGRAM_COMPILE
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default n
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help
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Change the compiler configuration so that a 'scan-build make'
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has a chance to succeed.
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endmenu
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source mainboard/Kconfig
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source arch/x86/Kconfig
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source lib/Kconfig
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source device/Kconfig
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# These are used for internal purposes only:
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# Buses:
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config NO_PCIX_SUPPORT
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boolean
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config NO_PCIE_SUPPORT
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boolean
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config HYPERTRANSPORT_SUPPORT
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boolean
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config NO_AGP_SUPPORT
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boolean
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config NO_CARDBUS_SUPPORT
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boolean
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# Northbridges:
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config NORTHBRIDGE_AMD_GEODELX
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boolean
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config NORTHBRIDGE_AMD_K8
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select HYPERTRANSPORT_SUPPORT
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boolean
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config NORTHBRIDGE_INTEL_I440BXEMULATION
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boolean
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config NORTHBRIDGE_VIA_CN700
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boolean
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config NORTHBRIDGE_INTEL_I945
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boolean
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# Southbridges:
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config SOUTHBRIDGE_AMD_CS5536
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boolean
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config SOUTHBRIDGE_INTEL_I82371EB
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boolean
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config SOUTHBRIDGE_NVIDIA_CK804
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boolean
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config SOUTHBRIDGE_NVIDIA_MCP55
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boolean
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config SOUTHBRIDGE_AMD_AMD8151
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boolean
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config SOUTHBRIDGE_AMD_AMD8132
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boolean
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config SOUTHBRIDGE_AMD_AMD8131
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boolean
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config SOUTHBRIDGE_AMD_AMD8111
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boolean
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config SOUTHBRIDGE_AMD_SB600
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boolean
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config SOUTHBRIDGE_AMD_RS690
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boolean
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config SOUTHBRIDGE_VIA_VT8237
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boolean
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config SOUTHBRIDGE_INTEL_I82801GX
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boolean
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# Super I/Os:
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config SUPERIO_WINBOND_W83627HF
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boolean
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config SUPERIO_WINBOND_W83627THG
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boolean
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config SUPERIO_FINTEK_F71805F
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boolean
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config SUPERIO_ITE_IT8716F
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boolean
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config SUPERIO_ITE_IT8712F
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boolean
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config SUPERIO_VIA_VT1211
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boolean
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# Other devices that may be optional for a board:
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config DEVICE_AMD_CS5536_NAND
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select SOUTHBRIDGE_AMD_CS5536
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boolean
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menu "Payload"
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config PAYLOAD_ELF_LOADER
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bool "Include ELF payload loader"
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default n
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help
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This option allows an unparsed ELF payload to be added and loaded.
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choice
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prompt "Payload type"
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default PAYLOAD_NONE
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config PAYLOAD_ELF
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bool "An ELF executable payload file"
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help
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Select this option if you have a payload image (an ELF file)
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which coreboot should run as soon as the basic hardware
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initialization is completed.
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You will be able to specify the location and file name of the
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payload image later.
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config PAYLOAD_NONE
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bool "No payload"
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help
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Select this option if you want to create an "empty" coreboot
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ROM image for a certain mainboard, i.e. a coreboot ROM image
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which does not yet contain a payload.
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For such an image to be useful, you have to use the 'lar' tool
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to add a payload to the ROM image later.
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endchoice
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config PAYLOAD_FILE
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string "Payload path and filename"
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depends PAYLOAD_ELF
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default "payload.elf"
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help
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The path and filename of the ELF executable file to use as payload.
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config PAYLOAD_NO_PREPARSE_ELF
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bool "Add ELF without parsing and converting to LAR entries"
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depends PAYLOAD_ELF && PAYLOAD_ELF_LOADER
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default n
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help
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Until now, coreboot has used ELF for the payload. There are many
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problems with this, not least being the inefficiency -- the ELF has
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to be decompressed to memory and then the segments have to be
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copied. Plus, lar can't see the segments in the ELF -- to see all
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segments, you have to extract the ELF and run readelf on it.
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There are problems with collisions of the decompressed ELF
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location in memory and the segment locations in memory.
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Finally, validation of the ELF is done at run time, once you have
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flashed the FLASH and rebooted the machine. Boot time is really
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not the time you want to find out your ELF payload is broken.
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Without this option, coreboot will direct lar to break each ELF
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segment into a LAR entry. ELF will not be used at all. Note that
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(for now) coreboot is not backward compatible -- if you put an ELF
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payload in, coreboot can not parse it. We hope to remove ELF
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entirely in the future.
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config ZERO_AFTER_PAYLOAD
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bool "Zero fill lar after adding the payload"
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depends PAYLOAD_ELF
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default n
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help
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This option speeds booting but makes it so that no further files may
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be added to the lar.
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endmenu
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