Commit graph

8 commits

Author SHA1 Message Date
Ronald G. Minnich
f385338a15 Make cs5536_setup_onchipuart() handle both UARTs and add missing break in dbe61 initram.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Tested on dbe62. I had to run cs5536/stage1.c through indent -kr -i8 because emacs is somehow 
confused by parts of it. Weird. indent made some parts ugly, at least to my eyes. Oh well. 
Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://coreboot.org/repository/coreboot-v3@638 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-03-07 06:33:05 +00:00
Ronald G. Minnich
718dab6ba5 This is a cumulative set of fixes for LX800 boards. These are all tested on ALIX 1C and DBE62.
This includes:
 - the working power button patch.
 - onchipuart2 for very early startup -- this will be replaced with a better mechanism soon.
 - dts mod for powerbutton on cs5536
 - dbe62 dts fix for COM1 setup
 - ram check call in dbe62 initram.c
 - Carl-Daniel's fix to detect incorrect access to spd variables.
 - more debug prints in geodelx northbridge support code.

 This is cumulative since we're lagging on acks a bit and it's hard to keep this
 stuff all seperated out since it involves a common set of files. I'd like to get
 it acked and in tree today if possible. It's a very small set of lines changed so please
 forgive me for the cumulative nature.

 Thanks

 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>


Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>






git-svn-id: svn://coreboot.org/repository/coreboot-v3@636 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-03-06 23:33:59 +00:00
Stefan Reinauer
6220b632e7 Now version 3: LinuxBIOS -> coreboot rename.
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-27 18:54:57 +00:00
Uwe Hermann
7705f6a682 Various smaller code fixes:
- Use 'static' for functions and structs which are not meant to be public.

 - Use 'const' for variables which are not meant to be modified.

 - Move some prototypes into legacy.h where they belong.

 - Drop prototypes for non-existing functions.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@460 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-20 14:03:39 +00:00
Uwe Hermann
5fc23dcc1f Various coding style fixes and cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@443 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-10 19:44:22 +00:00
Ronald G. Minnich
e62540d291 1. move early_* names to stage1.c
2. rename *_early_init symbols to *_stage1
3. Rename early_init to hardware_stage1

now people can see when things are supposed to happen. 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@407 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-06-29 00:09:24 +00:00
Ronald G. Minnich
e19d69c558 OK, this includes all the mods that should give you a compileable
initram. Gets errors as we don't have ram support yet, working that
now.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@354 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-06-15 15:33:50 +00:00
Uwe Hermann
c333fc9769 Add header file for the AMD Geode CS5536 Companion Device.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@343 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-06-05 10:13:24 +00:00