Commit graph

22 commits

Author SHA1 Message Date
Marc Jones
a794edb17b Setup the MTRRs in stage1 so that memory and cache are available throughout
stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
It also sets all system memory to WriteBack cached and sets the ROM
area to cached.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@1128 f3766cd6-281f-0410-b1cd-43a5c92072e9
2009-02-10 22:40:10 +00:00
Myles Watson
f59b4ca24a This patch removes the offset_pciio since there is never an offset_pciio an
offset_pciio and an offset_io.  This makes it easier to port things from v2.

It also updates mcp55 and some whitespace there.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1099 f3766cd6-281f-0410-b1cd-43a5c92072e9
2009-01-05 23:04:13 +00:00
Ronald G. Minnich
a492ff7cc9 Kill off stage1_mtrr.c completely, and bring in mtrr.c for stage2 from v2.
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>

It could use some cleanup, but looks good.

Acked-by: Peter Stuge <peter@stuge.se>

With some cleanup.

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://coreboot.org/repository/coreboot-v3@1085 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-12-23 19:02:44 +00:00
Corey Osgood
85f94c96c1 Check that the CAR and ROM areas don't collide.
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@1071 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-12-11 06:33:29 +00:00
Carl-Daniel Hailfinger
cb9db3b6d0 We are woefully unaware about how much stack v3 really uses.
This is a complete rewrite of my earlier stack checker proposal.
It works for CAR and RAM, has better abstraction and actually gives us
nice results.
The stack checker is default off due to its rather measurable impact on
boot speed.
Diagnostic messages are printed on first initialization, directly after
RAM init and directly before passing control to the payload. Sample qemu
log is attached. Extract from that log follows:

coreboot-3.0.986 Fri Nov  7 04:04:37 CET 2008 starting...
(console_loglevel=8)
Initial lowest stack is 0x0008fe98
Choosing fallback boot.
[...]
Done RAM init code
After RAM init, lowest stack is 0x0008fe30
Done printk() buffer move
[...]
LAR: load_file_segments: Failed for normal/payload
Before handoff to payload, lowest stack is 0x0008bf50
FATAL: No usable payload found.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1012 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-11-13 01:28:32 +00:00
Carl-Daniel Hailfinger
8b1b420e6b We need a way to find out where our stack and our global variables are
at any given moment. The code is generic enough to handle this in a
processor-specific way behind the scenes if needed.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@933 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-10-16 03:03:33 +00:00
Ronald G. Minnich
be03d189db Finally, after two years, put in real code for stop_ap(). Code has to be
moved to stage1 ROM code. Make the struct for nodeid/coreid generic to 
x86. Create the functions for existing architectures are a model for 
future architectures (VIA coming soon we hope). 

Move includes so that things build correctly now. 

This is actually a small patch that impacted a number of files due to 
include order changes. This is build and boot tested on simnow and 
build tested on geode. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@872 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-09-29 14:58:56 +00:00
Ronald G. Minnich
e053a1004c substantial cleanups for k8.
AMP TinyGX still builds, this won't affect other platforms. 

clean up 8111 stage1 code; add function to smbus, 
memreset_setup_amd8111, for the 8111 specific parts of memreset. 

include k8 .h to reduce warnings. Turn some things into functions (romcc
legacy cleanup) and put them in .c files. 

simnow actually successfully gets through a reset cycle now. 

Next is to fix the fidvid code. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@868 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-09-19 18:35:22 +00:00
Ronald G. Minnich
ff2ddcb313 This gets us back to a compiling k8 target.
This code has been tested on dbe62, and builds for qemu as well. 

the next step is testing on simnow. 

k8.h: add more prototypes and some required inline functions. 
cpu.h: same
serengeti: expand defines in mainboard.h, though we need a better 
mechanism; continue to fix initram.c, add new support files to Makefile
lib/console.c: include globalvars.h
lib/lar.c: Provide more informative print as the lar is scanned.
k8 north: needed reset_test.c from v2, fixes to raminit.c
arch/x86
Kconfig: new CONFIG variable CBMEMK, meaning coreboot mem k, memory
	used for coreboot. 
init_cpus.c: functions to start up CPUs
stage1_mtrr.c: bring over early mtrr support from v2.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@847 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-30 03:35:40 +00:00
Carl-Daniel Hailfinger
9342d1be4e The ABI wrapper from r775 made the SHARED definitions obsolete. They're
not that readable anyway, so kill them and use standard definitions
instead.

Introduce EXPORT_SYMBOL for shared symbols. EXPORT_SYMBOL tells the
compiler to use the standard calling conventions for a given symbol and
not to optimize it away.
Benefits:
- We can later use gcc -combine -fwhole-program without problems.
- It's a correctness fix for some optimizations.
- We could check for duplicated exported functions at link time.
- We could check whether exported functions are linked into initram or
stage2 by accident.
- We could generate usage statistics and possibly optimize away unused
shared functions.
- Through the above points, significant side reductions of 10-40%

Build and boot tested on qemu.
Build tested on all targets.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@780 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-17 21:51:13 +00:00
Carl-Daniel Hailfinger
07f3009f43 Introduce a generic global variable storage mechanism and switch the
printk buffer management to it.

Build tested and boot tested and result tested on Qemu.

Adding a new global variable is not as easy as it looks, but the
comments in the code should be good enough to tell you how.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@760 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-14 09:25:58 +00:00
Ronald G. Minnich
7e78ce492a Make some things (die, mem*, resourcemap code, option code) SHARED.
The option code is tricky as it is used by standalone code. If you 
include that file and you are standalone, you now have to define 
STANDALONE (is there a better way?)
Change the cpuid to be a 24-byte string instead of 3 u32s.
Make the CPUID usage PIC-safe by not using %ebx.

Test building on two different geodes, tested to boot on dbe62

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@750 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-12 03:39:39 +00:00
Ronald G. Minnich
da9286b479 State of the tree for K8
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@722 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-05 02:48:54 +00:00
Ronald G. Minnich
54b7a9609f With a bug fix from peter and a suggest change by Carl-Daniel
Resource map and a way to use the pci config stuff from stage 1, done in 
a way that will work in stage 2 (but only for systems that use type 1
config cycles; will fail for type MEM config cycles). 

We need to rethink the PCI config stuff per Stepan's comment, in part 
because the device tree now includes things that are NOT PCI devices. 
Stepan's suggestion, to make the functions take busdevfn as the 
parameter, makes a lot of sense. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.s


git-svn-id: svn://coreboot.org/repository/coreboot-v3@720 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-05 01:19:37 +00:00
Carl-Daniel Hailfinger
5d11489d74 Make printk() log to a buffer.
Tested on Qemu and Geode LX.
Benefits of this patch:
- printk() now works directly after printk_buffer_init(), even before
the serial port is set up.
- If all you want is a log, you don't have to bother with serial output.
- A payload can read and analyze the log.
- You can build on this and buffer log until serial is available, then
flush the messages buffered so far.

The printk buffer is configurable with a default-on Kconfig variable.

If you want to dump the buffer from the Qemu monitor after CAR has been
disabled, use this command:
memsave 0x90000 65536 memdump.bin

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@590 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-02-13 15:48:37 +00:00
Stefan Reinauer
6220b632e7 Now version 3: LinuxBIOS -> coreboot rename.
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-27 18:54:57 +00:00
Uwe Hermann
7705f6a682 Various smaller code fixes:
- Use 'static' for functions and structs which are not meant to be public.

 - Use 'const' for variables which are not meant to be modified.

 - Move some prototypes into legacy.h where they belong.

 - Drop prototypes for non-existing functions.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@460 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-20 14:03:39 +00:00
Uwe Hermann
50cdf3827d Merge hlt() into cpu.h where it belongs. Add some documentation.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@449 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-12 13:01:42 +00:00
Uwe Hermann
b636ab9cf1 Bring the file cpu.h in sync with the current version of the code in
the Linux kernel (as far as possible). The code is a lot simpler
and shorter now.

Also, add cpu_relax() (which is also part of the Linux file) which
could be useful for busy-loops (but is currently not used).
Drop the cpu_relax() from spinlock.h as it's not spinlock related in any way.

The code builds, and works in QEMU, but is not tested on hardware.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@423 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-06-30 16:57:33 +00:00
Ronald G. Minnich
1e3cd03815 Add a few functions.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@378 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-06-27 20:01:10 +00:00
Uwe Hermann
f1f8bc2cd4 Document the origins of include/arch/x86/cpu.h (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@367 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-06-26 13:46:57 +00:00
Ronald G. Minnich
33c16b873a This adds cpu info support for v3. Other arch-specific cpu support
should go here. This file taken from V2.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@365 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-06-25 21:15:44 +00:00