Commit graph

197 commits

Author SHA1 Message Date
Marc Jones
5917206641 Cache the ROM to speed up stage2 and payload decompression.
Due to some problems with PCI transactions, Geode LX needs the ROM cache properties to be write-serialize + cache disabled by runtime. More details below.

Add mainboard_pre_payload() call to each mainboard as the final coreboot function before the payload is called by stage1.

Note that this patch also grows the bootblock from 16K to 20K to make room for mainboard_pre_payload().

"The problem is a transaction depth issue and bottlenecks inside the GX
and LX that go across PCI.  The conditions are very complicated but it
comes down to we need write serialization for writes to PCI. If you
look in the data book you can't have write serialization and the cache
enabled on a given area. During coreboot we don't have to worry about
a write or a PCI bus master so I think we can enable caching the ROM.
After coreboot we can't be sure what will happen in the system so we
need to set it up to be safe. For example flashrom just clears the
write protect bit. If the cache were enabled (no write serialization)
and flashrom was writing the ROM we would be in a precarious position.
A PCI  bus master doing a read or a write that has a hit on a tag
would cause enough bottleneck conditions that it might hit the bug. We
could change flashrom but that doesn't help other tools. We need to
leave the system in a safe state. Also, caching the ROM after it is no
longer used doesn't make much sense. So, we need a call just before
the payload runs to clean up the system."

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@573 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-02-06 02:36:50 +00:00
Ronald G. Minnich
575ca7374c This change moves the geodelxinit code from stage2 to stage1, which in
turn gets cache turned on much sooner. The system boots a bit faster. 

We're still far too slow, perhaps because we are not caching ROM? 

Index: arch/x86/Makefile
Add ../../northbridge/amd/geodelx/geodelxinit.o object
Index: arch/x86/geodelx/geodelxinit.c
add sizeram function. 
Index: arch/x86/geodelx/stage1.c
add called to northbridge_init_early()
Index: northbridge/amd/geodelx/Makefile
remove geodelxinit.o object
Index: northbridge/amd/geodelx/geodelx.c
remove call to northbridge_init_early()
remove sizeram function. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@572 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-02-04 16:16:16 +00:00
Ronald G. Minnich
3a43300f7b Move the text to 0x2000, so there is room for the IDT for vm86
emulation.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Marc Jones <marc.jones@amd.com>




git-svn-id: svn://coreboot.org/repository/coreboot-v3@570 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-31 14:01:23 +00:00
Stefan Reinauer
6e271fd1df rename linuxbios_table.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@565 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-28 17:50:56 +00:00
Stefan Reinauer
6220b632e7 Now version 3: LinuxBIOS -> coreboot rename.
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-27 18:54:57 +00:00
Ronald G. Minnich
5de5570bac This change will support stage2 running LAR files. The initial example
is running the VSA in the geode lx northbridge.

It builds but is not tested.

lar.h: make LAR functions SHARED
lar.c: make process_file non-static (i.e. global)
vsmsetup.c: modify to use LAR functions.
stage1.c: new function, init_archive, which is SHARED and will set up
the initial archive struct.

Note that some work remains. The use of unsigned longs and unsigned
shorts should be changed to u32/u16 as Carl-Daniel has pointed out,
Because this change requires changes elsewhere I am not including them
in this patch. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@561 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-26 03:40:00 +00:00
Carl-Daniel Hailfinger
cc0b9f7917 After configuring the PLL registers on Geode LX, we have to reset the
processor. However, nothing in the log tells the user why the processor
is being reset.
Example log follows:

LinuxBIOS-3.0.0 Fri Jan 11 15:53:52 MST 2008 starting...
Choosing fallback boot.
[...]
Fallback failed. Try normal boot
LAR: Attempting to open 'normal/initram/segment0'.
[...]
LAR: CHECK normal/initram/segment0 @ 0xfffc49b0
start 0xfffc4a00 len 5564 reallen 5564 compression 0 entry 0x000010ca
loadaddress 0x00000000
Entry point is 0xfffc5aca
pll_reset: read msr 0x4c000014
_MSR GLCP_SYS_RSTPLL (4c000014) value is: 00000398:0000181e
Configuring PLL


LinuxBIOS-3.0.0 Fri Jan 11 15:53:52 MST 2008 starting...
Choosing fallback boot.
[...]


Print an informative message before resetting the processor.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@553 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-12 01:09:47 +00:00
Carl-Daniel Hailfinger
99335d3c82 This fixes a build race (make -j2):
make: *** No rule to make target `LinuxBIOSv3/build/stage0-prefixed.o',
  needed by `LinuxBIOSv3/build/linuxbios.initram'.
Stop.

Signed-off-by: Robert Millan <rmh@aybabtu.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@552 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-10 21:13:19 +00:00
Carl-Daniel Hailfinger
e3b848139f This patch is an attempt at introducing 4k CAR size granularity for the
generic x86 code. For the old supported CAR sizes, the newly generated
code is equivalent, so it should be a no-brainer.

The patch is identical (except one build fix) to what was committed in
r3038 to v2.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@551 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-09 23:09:23 +00:00
Carl-Daniel Hailfinger
29d69787ea The current parameter situation of post_code() is rather mixed between
numeric constants and #defines for such constants. Since grepping the
tree shouldn't be necessary to find a POST code and we already have
too many duplicated POST codes, gather almost all of them in a common
header file.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@549 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-07 16:34:34 +00:00
Carl-Daniel Hailfinger
06f72c080f Fix a simple error in stage1.c (missing else).
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@548 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-05 01:35:57 +00:00
Carl-Daniel Hailfinger
888063b4af These changes implement a fixed Geode LX Cache As Ram that allows a
return from disable_car.
- Move the cache as ram memory to 0x80000 instead of 0xc8000, as the C
  range is really tricky to get right :-)
- Modify the geode disable_car to ensure the cache is flushed to ram on
  the wbinvd.

With these changes, I get a payload loaded.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@546 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-04 23:19:49 +00:00
Carl-Daniel Hailfinger
cbbddbe4db Move AMD Geode LX defines for CAR from a .S to a .h so they are
available to C.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@543 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-04 12:53:09 +00:00
Carl-Daniel Hailfinger
91b0dd0974 To reduce code duplication, make sure STAGE2_OBJ does not contain
any object already mentioned in STAGE0_OBJ.
This saves 386 bytes in qemu stage2 (~240 bytes after LZMA compression).

Build tested and runtime tested in Qemu.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@540 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-06 16:03:32 +00:00
Carl-Daniel Hailfinger
29aef7a30f linuxbios.stage2.o (and stage2.o in the LAR) are NOT .o files, they are
ELF executables. Remove the .o suffix to reduce confusion.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@539 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-05 01:45:55 +00:00
Carl-Daniel Hailfinger
aa9bb6e81b Absolute calls from initram were only working from the file which had
_MAINOBJECT #defined. Calls from all other files ended up in nirvana
because the compiler was not able to calculate the address of the
wrapper for the absolute call. The linker tried, but failed miserably.
Use the -combine flag and compile all of initram at once. This enables
GCC to calculate the address of the abscall wrapper, resulting in
working code.

Segher Boessenkool thinks the patched code works only by accident
because GCC has no way to specify generation of XIP code. According to
him, future GCC versions or other circumstances may break the code.

While this patch makes code work for now, it does NOT check whether the
generated code tries to write to memory outside the stack (general
writable data). That will of course fail, but I hope porters are smart
enough to avoid that.

Corey Osgood writes:
Great work tracking this down! This is okay for now, but we need to look
for a better solution in the future. Counting on porters who may or may
not remember this discussion to avoid something isn't good
future-proofing.

Checking the ELF sections for read-write data and stopping the build
with an error could make this future-proof.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@537 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-04 22:42:38 +00:00
Uwe Hermann
4ad781a8a6 Move the code from northbridgelib.c to pci_device.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@536 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-04 21:06:52 +00:00
Uwe Hermann
583dac1c6a Factor out common functions which almost all northbridges share
into lib/northbridgelib.c.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@534 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-03 20:32:53 +00:00
Carl-Daniel Hailfinger
82ea8a8b1e Consolidate all multiple segment handling into
lib/lar.c:load_file_segments() and greatly simplify arch/x86/stage1.c
code as a result. While I'm at it, improve the LAR segmentation
abstraction. Stage 1 code should not have to care about internal
representation of segments, that knowledge belongs into lib/lar.c.
Constification of most function parameters in lib/lar.c led to a few
other now obvious code removals.

Build tested and runtime tested in Qemu.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@530 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-28 22:50:00 +00:00
Carl-Daniel Hailfinger
210463d65c Factor out one identical makefile rule from all mainboard makefiles to
the x86 arch makefile. This makes porting to a new mainboard less
confusing.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@529 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 19:06:45 +00:00
Ronald G. Minnich
9df08251e0 add one debug print, move all smbus_read_byte to spd_read_byte.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@527 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 16:47:34 +00:00
Carl-Daniel Hailfinger
09b3820e93 Convert stage2 handling from binary blob to multi-segment LAR which is
created by parsing the ELF file linuxbios.stage2.o. That way, we avoid
manual specification of the entry point for stage2 code. A few LAR
functions are now unused and can be removed in a following cleanup
session.
Another suggested cleanup would be factoring out a load_all_segments
function, resulting in less code duplication.

Ron says:
> This is great. We killed the blob. In the movie, it was impossible.
> FYI, the new approach works on real hardware, I am getting nice printk
> messages from stage1!

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@524 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 14:44:54 +00:00
Carl-Daniel Hailfinger
7eb899b0bb Use the elf-parsing capabilities of LAR to parse the initram.o file,
and create a valid LAR header with an entry value. This will fix the
problems Ron is having on the ALIX 1C and probably allow it to boot.
It also sets the text base of the .o to 0, instead of whatever wacky
value gld is choosing, so all platforms will have the same value.
Get away from worrying about potential gld bugs, now and in the future.

As added benefit, we obsolete a lot of code without introducing
new code.

Qemu target entry point debugging has been added to be able to spot
problems with entry points in the future.

This patch is a joint work of Ron and Carl-Daniel.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@523 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 14:38:43 +00:00
Uwe Hermann
497cdb7484 Constify structs which can be const.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@519 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-26 13:28:52 +00:00
Uwe Hermann
5ff0fdb354 Move the code from strings.h to a C file. We should really avoid
to have code in header files.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@518 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-24 22:17:26 +00:00
Uwe Hermann
441145f9fe Add comment, small style fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@514 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-21 18:25:20 +00:00
Uwe Hermann
e28f0155f6 Only post_code.h should have the prototype for post_code() from
post_code.c (thus drop it from console.h).

Instead, have console.h #include post_code.h and drop other
explicit #includes of post_code.h in the code; console.h is already
included in pretty much every file.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@513 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-20 19:06:03 +00:00
Carl-Daniel Hailfinger
09f99f998d Improve printk documentation to match code realities.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@510 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-16 11:17:57 +00:00
Carl-Daniel Hailfinger
b9c8454adf Fix a corner case access to uninitialized memory (NULL pointer
dereference or worse) in case the archive length is exactly
sizeof(struct lar_header). Such an archive is invalid because the
filename directly after the LAR header is always dereferenced and has to
be at least 1 byte in the "empty filename" case (only terminating \0).
Improve LAR code documentation and reorder variables in one assignment
to make the code more obvious and readable. This will help people
understand what the code does when they look at it half a year from now.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@506 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-10-16 18:59:36 +00:00
Stefan Reinauer
a15933d861 Create shared symbols for stage0 functions.
This fixes for example printk calls from initram code.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@505 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-10-11 16:13:12 +00:00
Stefan Reinauer
9e4a632f6e minor changes to remove a warning here. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@504 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-10-10 16:55:03 +00:00
Stefan Reinauer
a2b318b2c4 Fix the config process so that pre-parsing of elf works again. It was broken
(I think) when the PAYLOAD_NONE change was put in.                                                                                        

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>   
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@503 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-10-04 05:37:24 +00:00
Uwe Hermann
d2d637c4ac Add a pointer to the root device to the LinuxBIOS table. Used for
example to access the device list from Open Firmware.

Signed-off-by: Jens Freimann <jens@freimann.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@500 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-09-25 00:22:18 +00:00
Ronald G. Minnich
94864de286 These are type cleanups and a genuine bug fix.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@494 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-09-05 15:17:20 +00:00
Stefan Reinauer
bf7873fb20 run_address gets called with entry=0. This patch fixes it.
Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@491 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-09-05 01:59:27 +00:00
Stefan Reinauer
9816be9a2c the new multi-segment lar handling has an off-by-one error in the
printk. 

Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>                                                             
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@488 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-09-05 01:47:21 +00:00
Uwe Hermann
0c9455284d This switches the only remaining non-userspace code from uint*_t to u*.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@486 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-08-30 10:25:43 +00:00
Ronald G. Minnich
ca1953808e Make the load address and entry 64 bits.
Remove a broken proto from a c file.
Fix protos etc. per uwe's request for const where it made 
sense. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@485 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-08-29 22:27:31 +00:00
Ronald G. Minnich
3d4b4784e5 This patch is revised based on comments. This is the "remove elf and
replace with LAR" series; this set is for arch/x86.


note that the payload is now payload/segment0, payload/segment1, etc. I've extended
linuxbios to look for these. Note that you can now see all the things
that get loaded ;they're no longer hidden in an ELF header somewhere.
Elf failures are gone!

Note that I've left legacy elf support in, for now, but recommend we
get rid of it as soon as possible.

patch attached. This is a first pass. lar.c needs some refactoring but
I want to get the cmdline going. You can now have a linux payload and
it will uncompress with no problems.

This has been tested with filo and BOCHS.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@482 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-08-29 15:05:01 +00:00
Uwe Hermann
d73c7038ba This patch changes all occurences of (working) %Lx to (standards
conformant, working) %llx in printk/printf.
While I'm at it, affected lines with 271 characters can be broken into
smaller chunks.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@479 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-08-26 12:06:51 +00:00
Stefan Reinauer
e825daf11e fix building LinuxBIOS with new lar. lar fails now if the target file
already exists.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@475 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-08-20 00:36:20 +00:00
Stefan Reinauer
c4d5d3861a small trivial patch to fix return types, printk warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@467 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-08-18 23:31:09 +00:00
Stefan Reinauer
0598fd602a This patch removes all printk format warnings from my LBv3 build (Qemu
x86 config). This was tested with gcc 4.1.0 on x86 and gcc 4.2.1 on x86_64.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@466 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-08-11 18:38:24 +00:00
Uwe Hermann
7467eba22a Various code cleanups:
- Simplify lots of code, especially msr-related code.

 - Move struct msrinit declaration into msr.h as we use it quite often
   and there's no use to duplicate it again and again in each file.

 - Remove unrequired variable usage (e.g. numEnabled, msrnum, val, port).

 - Remove useless comments.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@464 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-23 23:18:41 +00:00
Stefan Reinauer
276a0e0ec9 * move post_code() to a seperate file
* statically link linuxbios.initram for now (depends on printk, post_code
  and die)
* greatly simplify all makefiles by creating a global Rules.make
* use $(dir $@) in Makefiles instead of absolute paths for mkdir..
* clean up Makefiles by calling components' code locally instead of in the
  Makefile. (Remember: one day, no code per mainboard)
* unconditionally create .xcompile in case it changed
* add NM to xcompile                          
* create $(obj)/linuxbios.map with all symbols of all stages

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@463 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-23 16:49:00 +00:00
Uwe Hermann
7705f6a682 Various smaller code fixes:
- Use 'static' for functions and structs which are not meant to be public.

 - Use 'const' for variables which are not meant to be modified.

 - Move some prototypes into legacy.h where they belong.

 - Drop prototypes for non-existing functions.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@460 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-20 14:03:39 +00:00
Marc Jones
064cd70619 Stage0 and Stage1 improvements. Gets Geode LX into initram. Use LAR XIP. Add disable_CAR().
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com> 



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@459 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-19 15:15:57 +00:00
Marc Jones
396fdc33a7 Clean up do_normal_boot() by adding defines, moving defines to the header file, and add a function header.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@457 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-18 19:19:48 +00:00
Uwe Hermann
96a2aac67e Minor fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@454 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-15 21:31:05 +00:00
Patrick Georgi
7e5b9406af - fix build of ulzma
- support decompression in the lar loader
- support compressed payloads in stage1
  (copies payloads to 0x60000 unconditionally)
- hook up decompressors in Makefile
- disable compression for option_table and initram

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@452 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-07-12 20:03:02 +00:00