Commit graph

561 commits

Author SHA1 Message Date
Ronald G. Minnich
5de5570bac This change will support stage2 running LAR files. The initial example
is running the VSA in the geode lx northbridge.

It builds but is not tested.

lar.h: make LAR functions SHARED
lar.c: make process_file non-static (i.e. global)
vsmsetup.c: modify to use LAR functions.
stage1.c: new function, init_archive, which is SHARED and will set up
the initial archive struct.

Note that some work remains. The use of unsigned longs and unsigned
shorts should be changed to u32/u16 as Carl-Daniel has pointed out,
Because this change requires changes elsewhere I am not including them
in this patch. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@561 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-26 03:40:00 +00:00
Ronald G. Minnich
3ac5450814 This is a first cut at the implementation of VSM support. What has do be
done, long term, 
is to remove almost all of the vsmsetup.c file and use functions in the
vm86.c file.
 

The barrier to achieving that goal is the specialized nature of the vga
bios support code vs. the vsm bios support code. 
There are a few issues to resolve but what I'd like
to do is get VSA working first, then work out how to merge the rest of
the code. 

I have already done some merging at this point. 

This code does not yet work. But the board does not work either, and I 
want to get the code into the repo in case my hard drive dies.

Makefile: add vmsetup.o 

vsmsetup.c: Add this file from v2. Fix copyright and includes. 
Remove almost all assembly code in favor of code in vm86.c. 
In future, almost all code will be removed and the vm86.c code used
instead. 

vm86.c: make some assembly symbols .globl so that vsmsetup.c can use
them. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@560 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-24 21:54:22 +00:00
Carl-Daniel Hailfinger
b25aefd7b2 Fix a compile warning in device/device.c
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@559 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-21 02:39:45 +00:00
Carl-Daniel Hailfinger
68b97a6034 include/device/device.h
Remove old vendor,device struct members since we are now using the
device_id struct. 
Change declaration of dev_find_device to use device_id struct. 

device/device_util.c
Change dev_find_device to use device_id struct instead of vendor, device
parameters.
Add convenience function, dev_find_pci_device, to make it easier for
users. 

device/pci_device.c
Change uses of dev->vendor and dev->device to dev->id. 
Change prints of dev->vendor, dev->device to use the 
dev_id_string function. 

device/pci_rom.c
Change uses of dev->vendor and dev->device to dev->id. 

southbridge/amd/cs5536/cs5536.c
Change uses of dev_find_device to dev_find_pci_device

southbridge/amd/cs5536/dts
Add pciid of the cs5536

northbridge/amd/geodelx/dts
add pciid of the geodelx northbridge. 

util/x86emu/vm86.c
Change uses of dev_find_device to dev_find_pci_device

With these changes, the chipsetinit function now finds the southbridge
in the static tree, which is the first time this has worked in v3.
This success in turn means that the chipsetinit code is running for the
first time. 
We are still failing in "Finding PCI configuration type"

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@558 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-20 23:03:40 +00:00
Ronald G. Minnich
7c1623aec3 include/device/device.h:
Change the ID constants so they are more useful for debugging. 
Instead of simple 1,2,3 they now are a 4-byte value which can be more
useful when looking at memory with a debugger. Lots of variables can be 
'1', but fewer variables will match to 'PCID'. 

include/device/pci.h: 
Include pci_ids.h in pci.h

device/device.c: remove silly comment. Change memcpy to struct assign, this makes it possible 
for the C compiler to do type checking. Add assign for the dev->id. 

flattree.c: Support the use of 'domainid' and 'pciid' in the per-chip dts. These IDs will be assigned
to the static tree device struct. In conjunction with the earlier patch, this change removes the need
for users to assign the ops struct member in the dts by hand, as it is done in the qemu port today. 
The ops struct member will automatically be assigned by the dev_init function, which is run 
in stage2 before any actual device code is run. (This change to dev_init was in the previous patch). 
Added two comments that document what is going on. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@557 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-19 06:29:14 +00:00
Ronald G. Minnich
7e806b90e6 This change is for tidying up some unfinished business in the device code.
I just uncovered this problem while trying to get the lx going. 

The symptom was that the northbridge ops were never getting run, 
in particular the phase 2 ops for the geodelx were not running. The 
reason was that the ops struct member for the device was not set. 

How is the ops struct member set? 
Currently, the ops vector for a static device (i.e. a device created from the 
dts) has to be set by hand, as in mainboard/emulation/qemu-x86/dts:
	domain0 {
		/config/("northbridge/intel/i440bxemulation");
		ops = "i440bxemulation_pcidomainops";

This requirement is ridiculous (it's my fault). If we know the part, 
and have the dts, we should not have to explicitly name the ops. In fact the
constructors array, defined at the end of the various device files, makes 
searching for an ops struct for a dynamic device automatic. We should 
support this automatic behavior for static devices too. 

Given the function find_constructor
in device/device.c, why don't we just use that? The problem is that we did 
not set up the device struct to include a device id, just a device path, and
find_constructor requires a device_id -- which makes sense, I hope, 
as the path is its pci path (e.g. 0:1.0) and the constructors are defined by the 
device id (i.e. it is the same constructor for a given part, no matter how many
of the part we have). 

So, as a start to fixing this limitation (this is going to take several patches), 
I've done the following:
1. add a struct device_id to the device struct. 
2. extended the dev_init code in device/device.c -- this is the first function
    called from lib/stage2.c -- to find a constructor for the dev->id and, if
    found, set dev->ops to it. 

Result: for static devices with the id set, the ops pointer will be set 
automatically. Coreboot builds fine with this change. 

The next change will be to add dtc commands to set ids. 
Currently, we have commands like pcipath, pcidomain, etc.; 
the new commands will look like pciid, domainid, etc. Once we have these
commands, we will have made it possible to set ops automatically. We 
can just set the ids in the device dts file, and users will never have to 
see any of this complication. 

The final change will be a bit more complicated. Right now, if you look in, 
e.g., northbridge/amd/geodelx/dts, you'll see that we have one dts, but 
the northbridge plays three roles. We can't easily contain those three 
roles in one dts (I am open to suggestions showing I am wrong). 
I am going to propose that we have more than one dts file
in a directory, so instead of 
northbridge/amd/geodelx/dts 
we would have
northbridge/amd/geodelx/dtsdomain
northbridge/amd/geodelx/dtsapic
northbridge/amd/geodelx/dtspci
so that we could set the variables for each of these individual components. 

There is no need to split geodelx.c into three .c files, however. 

Finally, I will be removing the archaic vendor and device unsigned's from
the device struct in future, but as I say, I am trying to stage these changes
to keep them understandable. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>


Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@556 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-17 16:32:12 +00:00
Ronald G. Minnich
22a005f670 This change adds a dts file for the amd geodelx northbridge. The
northbridge has several constructors, so it is required, if these 
constructors 
are to be compiled in to the running image, that a dts be provided. 

To use the dts, one must add a /config/ line to the components 
that use it, hence the change to the mainboard dts .

This change does not produce a working bios as far as I can tell. 
But it is still important to have it in. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@555 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-17 05:37:41 +00:00
Stefan Reinauer
bb27df9d6f rename repository from LinuxBIOSv3 to coreboot-v3
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@554 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-16 16:18:32 +00:00
Carl-Daniel Hailfinger
cc0b9f7917 After configuring the PLL registers on Geode LX, we have to reset the
processor. However, nothing in the log tells the user why the processor
is being reset.
Example log follows:

LinuxBIOS-3.0.0 Fri Jan 11 15:53:52 MST 2008 starting...
Choosing fallback boot.
[...]
Fallback failed. Try normal boot
LAR: Attempting to open 'normal/initram/segment0'.
[...]
LAR: CHECK normal/initram/segment0 @ 0xfffc49b0
start 0xfffc4a00 len 5564 reallen 5564 compression 0 entry 0x000010ca
loadaddress 0x00000000
Entry point is 0xfffc5aca
pll_reset: read msr 0x4c000014
_MSR GLCP_SYS_RSTPLL (4c000014) value is: 00000398:0000181e
Configuring PLL


LinuxBIOS-3.0.0 Fri Jan 11 15:53:52 MST 2008 starting...
Choosing fallback boot.
[...]


Print an informative message before resetting the processor.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@553 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-12 01:09:47 +00:00
Carl-Daniel Hailfinger
99335d3c82 This fixes a build race (make -j2):
make: *** No rule to make target `LinuxBIOSv3/build/stage0-prefixed.o',
  needed by `LinuxBIOSv3/build/linuxbios.initram'.
Stop.

Signed-off-by: Robert Millan <rmh@aybabtu.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@552 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-10 21:13:19 +00:00
Carl-Daniel Hailfinger
e3b848139f This patch is an attempt at introducing 4k CAR size granularity for the
generic x86 code. For the old supported CAR sizes, the newly generated
code is equivalent, so it should be a no-brainer.

The patch is identical (except one build fix) to what was committed in
r3038 to v2.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@551 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-09 23:09:23 +00:00
Marc Jones
ac309da3d9 Add hlt() back into the die() function and update the comments.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@550 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-09 18:27:49 +00:00
Carl-Daniel Hailfinger
29d69787ea The current parameter situation of post_code() is rather mixed between
numeric constants and #defines for such constants. Since grepping the
tree shouldn't be necessary to find a POST code and we already have
too many duplicated POST codes, gather almost all of them in a common
header file.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@549 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-07 16:34:34 +00:00
Carl-Daniel Hailfinger
06f72c080f Fix a simple error in stage1.c (missing else).
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@548 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-05 01:35:57 +00:00
Carl-Daniel Hailfinger
75c6c210de include/arch/x86/amd_geodelx.h had duplicated #defines by accident in
r546. Remove them again.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@547 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-05 01:33:28 +00:00
Carl-Daniel Hailfinger
888063b4af These changes implement a fixed Geode LX Cache As Ram that allows a
return from disable_car.
- Move the cache as ram memory to 0x80000 instead of 0xc8000, as the C
  range is really tricky to get right :-)
- Modify the geode disable_car to ensure the cache is flushed to ram on
  the wbinvd.

With these changes, I get a payload loaded.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@546 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-04 23:19:49 +00:00
Carl-Daniel Hailfinger
5638456d16 Change die() to make it JTAG friendly.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@545 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-04 23:14:10 +00:00
Carl-Daniel Hailfinger
af52a3c6d5 Add a banner function to lib/console.c that is SHARED so all code can
use it.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@544 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-04 23:12:22 +00:00
Carl-Daniel Hailfinger
cbbddbe4db Move AMD Geode LX defines for CAR from a .S to a .h so they are
available to C.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@543 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-01-04 12:53:09 +00:00
Ronald G. Minnich
9b1d2f4978 This is a trivial patch to correct a spelling error in a comment.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@542 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-11 01:24:52 +00:00
Carl-Daniel Hailfinger
61f0d0cfc8 util/lar/lar.h was accidentially changed to point to the wrong other
header.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@541 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-06 16:06:07 +00:00
Carl-Daniel Hailfinger
91b0dd0974 To reduce code duplication, make sure STAGE2_OBJ does not contain
any object already mentioned in STAGE0_OBJ.
This saves 386 bytes in qemu stage2 (~240 bytes after LZMA compression).

Build tested and runtime tested in Qemu.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@540 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-06 16:03:32 +00:00
Carl-Daniel Hailfinger
29aef7a30f linuxbios.stage2.o (and stage2.o in the LAR) are NOT .o files, they are
ELF executables. Remove the .o suffix to reduce confusion.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@539 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-05 01:45:55 +00:00
Carl-Daniel Hailfinger
73a83c1f17 Change wrong "LAR: NO FILE FOUND!" message to "LAR: File not found!".
The message appears if a file has not been found in the LAR archive and
is triggered even by lookup routines. Normal capitalization helps
reducing the frightening effect of the message.

Correct a few typos in other areas of the LAR code as well.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@538 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-04 23:15:33 +00:00
Carl-Daniel Hailfinger
aa9bb6e81b Absolute calls from initram were only working from the file which had
_MAINOBJECT #defined. Calls from all other files ended up in nirvana
because the compiler was not able to calculate the address of the
wrapper for the absolute call. The linker tried, but failed miserably.
Use the -combine flag and compile all of initram at once. This enables
GCC to calculate the address of the abscall wrapper, resulting in
working code.

Segher Boessenkool thinks the patched code works only by accident
because GCC has no way to specify generation of XIP code. According to
him, future GCC versions or other circumstances may break the code.

While this patch makes code work for now, it does NOT check whether the
generated code tries to write to memory outside the stack (general
writable data). That will of course fail, but I hope porters are smart
enough to avoid that.

Corey Osgood writes:
Great work tracking this down! This is okay for now, but we need to look
for a better solution in the future. Counting on porters who may or may
not remember this discussion to avoid something isn't good
future-proofing.

Checking the ELF sections for read-write data and stopping the build
with an error could make this future-proof.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@537 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-04 22:42:38 +00:00
Uwe Hermann
4ad781a8a6 Move the code from northbridgelib.c to pci_device.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@536 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-04 21:06:52 +00:00
Carl-Daniel Hailfinger
8d2ed3010b Ron mentioned he had strange hangs in pll_reset on various targets. This
may be due to miscompilation of XIP objects which do not have
_MAINBOBJECT defined. This issue was impossible to see on qemu because
no such object existed. Introduce initram_printktest.c in the Qemu
target, which will test for miscompilation and crash with a descriptive
error message.

This has been build tested and runtime tested on Qemu, and with my
compiler/linker combination it indeed crashes.
gcc (GCC) 4.2.1 (SUSE Linux)
GNU ld (GNU Binutils) 2.17.50.20070726-14 (SUSE Linux)

Trying with gcc-4.1 (GCC) 4.1.3 20070724 (prerelease) (SUSE Linux) and
the linker above had exactly the same results.

Unless we manage to fix the bug uncovered by this patch, leaving the
Qemu target in crashing state is the best thing we can do because this
behaviour mirrors the state of all other targets.

Ron says: I am comfortable with this. If hardware is broken, qemu should
be broken. I avidly wait the fix :-)

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@535 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-03 20:41:02 +00:00
Uwe Hermann
583dac1c6a Factor out common functions which almost all northbridges share
into lib/northbridgelib.c.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@534 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-12-03 20:32:53 +00:00
Carl-Daniel Hailfinger
2c48c909e0 Reorder the rules in mainboard/*/*/Makefile so their order is identical
across all of these makefiles. The rules are now in order of execution
during boot, that is:
STAGE0_MAINBOARD_OBJ
INITRAM_OBJ
STAGE2_MAINBOARD_OBJ
As added benefit, mainboard makefiles are now almost identical.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@533 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-30 22:43:42 +00:00
Alex Beregszaszi
446f7dffbb The attached patch adds code to checksum the pci extension rom and warn
if the stored and calculated checksum differ.

There is no easy way to check extension ROMs in the current machine for
correct signatures, but you could copy out the memory between 0xc0000 -
0xf00000 from /dev/mem and search for extension headers in it (see the
code in pci_rom.c).

Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@532 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-29 01:23:08 +00:00
Carl-Daniel Hailfinger
acf36c417f Fix SHARED macros in the non-_MAINOBJECT case. The patch I sent earlier
(which was committed) was unfortunately generated from the wrong tree.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@531 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-28 22:51:31 +00:00
Carl-Daniel Hailfinger
82ea8a8b1e Consolidate all multiple segment handling into
lib/lar.c:load_file_segments() and greatly simplify arch/x86/stage1.c
code as a result. While I'm at it, improve the LAR segmentation
abstraction. Stage 1 code should not have to care about internal
representation of segments, that knowledge belongs into lib/lar.c.
Constification of most function parameters in lib/lar.c led to a few
other now obvious code removals.

Build tested and runtime tested in Qemu.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@530 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-28 22:50:00 +00:00
Carl-Daniel Hailfinger
210463d65c Factor out one identical makefile rule from all mainboard makefiles to
the x86 arch makefile. This makes porting to a new mainboard less
confusing.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@529 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 19:06:45 +00:00
Ronald G. Minnich
1f4286cc5a move smbus_read to spd_read_byte. Add debug prints. These debug prints
and hcf may move to a common library later. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@528 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 18:17:59 +00:00
Ronald G. Minnich
9df08251e0 add one debug print, move all smbus_read_byte to spd_read_byte.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@527 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 16:47:34 +00:00
Ronald G. Minnich
30734516b0 Add an spd_read_byte prototype to spd.h. This is because I am going to
in a later patch make sure all dram
functions call spd_read_byte, not smbus_read_byte.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>


Acked-by: Corey Osgood <corey.osgood@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@526 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 16:24:57 +00:00
Ronald G. Minnich
2bae97c52f This gets as far as pll_reset and dies.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@525 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 16:19:34 +00:00
Carl-Daniel Hailfinger
09b3820e93 Convert stage2 handling from binary blob to multi-segment LAR which is
created by parsing the ELF file linuxbios.stage2.o. That way, we avoid
manual specification of the entry point for stage2 code. A few LAR
functions are now unused and can be removed in a following cleanup
session.
Another suggested cleanup would be factoring out a load_all_segments
function, resulting in less code duplication.

Ron says:
> This is great. We killed the blob. In the movie, it was impossible.
> FYI, the new approach works on real hardware, I am getting nice printk
> messages from stage1!

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@524 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 14:44:54 +00:00
Carl-Daniel Hailfinger
7eb899b0bb Use the elf-parsing capabilities of LAR to parse the initram.o file,
and create a valid LAR header with an entry value. This will fix the
problems Ron is having on the ALIX 1C and probably allow it to boot.
It also sets the text base of the .o to 0, instead of whatever wacky
value gld is choosing, so all platforms will have the same value.
Get away from worrying about potential gld bugs, now and in the future.

As added benefit, we obsolete a lot of code without introducing
new code.

Qemu target entry point debugging has been added to be able to spot
problems with entry points in the future.

This patch is a joint work of Ron and Carl-Daniel.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@523 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 14:38:43 +00:00
Carl-Daniel Hailfinger
d3a96b3f67 Make the lar more informative about loadaddress and entry point.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@522 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-27 01:12:48 +00:00
Uwe Hermann
9d16f2066e Initial support for the PC Engines ALIX1.C board.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@521 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-26 22:12:12 +00:00
Uwe Hermann
d26d82a4a6 Various cleanups and cosmetic fixes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@520 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-26 20:28:21 +00:00
Uwe Hermann
497cdb7484 Constify structs which can be const.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@519 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-26 13:28:52 +00:00
Uwe Hermann
5ff0fdb354 Move the code from strings.h to a C file. We should really avoid
to have code in header files.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@518 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-24 22:17:26 +00:00
Stefan Reinauer
e04ac72e78 Create a global rule for compiling raminit code to keep the mainboard
Makefiles clean and simple.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@517 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-22 23:43:06 +00:00
Uwe Hermann
daea2e08b0 The introduction of the _SHARED macros had one flaw: If multiple files
had _SHARED defined during compilation, each of them would contain an
assignment of stage0_printk to *printk. During linking, this caused
errors as multiple definitions of printk existed.
Make sure _SHARED alone gives you only the printk prototype, and iff
_MAINOBJECT is defined as well, include the assignment.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@516 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-22 22:54:11 +00:00
Uwe Hermann
7ffd614f3f Add mkdir calls to create the necessary directories. This should
probably be factored out together with the rest of the lines in
mainboard/* later, but for now it'll do.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@515 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-21 20:12:56 +00:00
Uwe Hermann
441145f9fe Add comment, small style fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@514 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-21 18:25:20 +00:00
Uwe Hermann
e28f0155f6 Only post_code.h should have the prototype for post_code() from
post_code.c (thus drop it from console.h).

Instead, have console.h #include post_code.h and drop other
explicit #includes of post_code.h in the code; console.h is already
included in pretty much every file.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@513 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-20 19:06:03 +00:00
Carl-Daniel Hailfinger
fe31d1970c Cleanup printk usage and documentation. Drop the second banner as it was
an artifact from the time when we needed stage2 phase 1 code to make
printk work.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@512 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-20 18:20:53 +00:00