Commit graph

107 commits

Author SHA1 Message Date
Stefan Reinauer
39a8f1f159 get rid of all warnings but one (lb table fake)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@107 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 15:35:42 +00:00
Stefan Reinauer
cfa73bace2 our code grew quickly. Since stage0 carries the library for all the
other stages, give it 16k instead of 8

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@106 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 14:04:39 +00:00
Stefan Reinauer
3fc4e990dc fix double checkin conflict
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@105 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 13:59:27 +00:00
Stefan Reinauer
b19bf330cf * add config options for serial port and speed
* add license header to console/vtxprintf.c and arch/x86/serial.c
* clean out dead code from console/vtxprintf.c
* adapt arch/x86/serial.c to CONFIG_ stuff
* actually include config.h in CFLAGS

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@104 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 13:55:28 +00:00
Ronald G. Minnich
afeb4e0b90 Add declaration to cachemain.c.
Oddly, this error just appeared, due to clashing commits. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@103 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 13:52:28 +00:00
Ronald G. Minnich
08016c4ca8 Basic elfboot functionality is in now.
We're trying to avoid the bounce buffer mess, which is really complex, 
by running elfboot out of the boot block. This code includes a really 
dumb allocator in elfboot which may or may not work. It basically
allocates off the elfboot() stack. 

This builds, but elfboot is not tested. That's next. 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@102 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 13:39:07 +00:00
Ronald G. Minnich
83ac9292bd add the arch-dependent elf defines.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@101 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 12:38:34 +00:00
Ronald G. Minnich
03a012f2e0 add the architecture dependent elfboot code.
call it something more useful than boot.c
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@100 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 12:37:56 +00:00
Stefan Reinauer
02a4d350c6 fix more warnings.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@99 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 12:36:45 +00:00
Ronald G. Minnich
f1545d6a9b fix mem.c declaration add size_t later once we understand the typedef
hell. 

more fixes to elfboot.c. more coming.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@98 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 12:36:43 +00:00
Ronald G. Minnich
b08b26ebcb Add compute_ip_checksum to makefile
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@97 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 12:23:33 +00:00
Ronald G. Minnich
534f6d31be mods to elf.h to use arch/elf.h
Some updates to the docs, but these will change more. 
add memcmp. Crude implementation, but it really does not matter. 
add compute_ip_checksum.c
mods to elfboot. Thanks to our new design, BOUNCE BUFFERS ARE DEAD. Yee
ha!
updates to makefile

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@96 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 12:21:47 +00:00
Stefan Reinauer
281cd76b38 * cleanup/refactor makefiles.
* remove some warnings

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@95 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 12:19:25 +00:00
Stefan Reinauer
0c11caa5e0 fix a warning, clean up code and makefiles
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@94 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 11:51:32 +00:00
Stefan Reinauer
464f4cb19d * initial console entries in Kconfig
* small warnings fixes

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@93 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 11:33:02 +00:00
Stefan Reinauer
791e590dea * rename devices to device for consistency
* fix malloc.c warnings
* add PCI_BUS_SEGN_BITS to pci.h


Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@92 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 11:23:37 +00:00
Stefan Reinauer
15dfcd2198 * fix some license headers
* add generic lib.h header for lib/ prototypes
* fix some prototypes
* put back return value parsing of stage2

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@91 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 11:03:56 +00:00
Ronald G. Minnich
592d34e1fc ip checksum file for elf booting.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@90 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 11:02:04 +00:00
Ronald G. Minnich
9fed5d8f66 Files needs for booting a payload. We are reducing the number of
directories in include, since having all those directories has obscured
understanding. 

Add elfboot.c to lib. Same argument, it is not in boot, it is in lib,
since fewer directories is better. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@89 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 10:58:00 +00:00
Ronald G. Minnich
01d7545b50 Set up default root device. Fix up printk stuff.
Fix up dts to set up ops struct member. Fix dts for qemu mainboard. 
We are getting past stage2 now, it is time for elfboot. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@88 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 10:38:22 +00:00
Stefan Reinauer
b4a7dad494 Clean up nasty dtc warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@87 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 10:13:24 +00:00
Stefan Reinauer
9c4c15c5ac Clean up Makefiles
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@86 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 09:54:10 +00:00
Ronald G. Minnich
c8ce9649ad Make sure to link stage 2 at 0x1000. We are now getting pretty far:
Phase 1: done
Phase 2: early setup ...
Phase 2: done
Phase 3: Enumerating buses...
dev_root missing 'ops' initialization
Allocating resources...
dev_root missing ops initialization
Enabling resources...
done.
Phase 6: Initializing devices...
Phase 6:Devices initialized

Now to fix up the device stuff. Once this is done, a linux kernel load
is next (i.e. elfboot)

NOTE: 0x1000 needs to become a config variable, usable in CODE and
Makefiles. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@85 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 09:33:33 +00:00
Ronald G. Minnich
d4c47470f0 Add the CAR disable code. It MUST be inline. Rather than a crufty
include, we just put it here. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@84 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 09:28:16 +00:00
Stefan Reinauer
ef81173a39 * drop objdir/srcdir
* seperate vsprintf to a seperate file as it was in v2.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@83 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 09:20:15 +00:00
Ronald G. Minnich
6a6535b204 We don't (yet) have an entry point field for LARs. I am not sure we ever
should -- KISS should apply. So, the first function called via LAR is the first
function in the file. 

For now, reorder this so main is first. 

We now are getting into stage 2. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@82 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 07:23:24 +00:00
Ronald G. Minnich
dd74fdac61 Pick a safer default for CacheBase -- not C segment.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@81 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 07:15:58 +00:00
Ronald G. Minnich
61d24531e5 Fixes to get it to build.
This builds but dependencies need work; it takes a few 
make -k
passes :-)

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@80 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 22:44:03 +00:00
Stefan Reinauer
417311203a Diffs which get us to stage two.
It's slightly broken by the merge, but we want to get it in.
Will be fixed tomorrow.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com> 
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@79 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 22:09:10 +00:00
Stefan Reinauer
27def7c3b3 This is the stage2.c function for the device tree creation.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@78 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 21:46:56 +00:00
Stefan Reinauer
d58a95061e Mods to device stuff. Rename passes to phases so that people can
figure out what happens in what order. General cleanup. Kill device_t.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@77 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 21:42:32 +00:00
Stefan Reinauer
0850d0cad8 Architecture changes. This gets us through stage 2.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com> 
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@76 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 21:39:25 +00:00
Stefan Reinauer
9051f6189c Library changes. Added malloc. Added mem* ops. Made a few other
changes. There is still debug crap in lar.c which will be pulled soon.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com> 
Acked-by: Stefan Reinauer <stepan@coresystems.de> 



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@75 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 21:22:29 +00:00
Stefan Reinauer
d0d2aa1b43 * drop typedef device_t
* rename magic device callbacks to phases
* drop obsolete printk_* macros
* add some prototypes to lar.h

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> 
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@74 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 21:18:02 +00:00
Stefan Reinauer
af8c57a00e * drop obsolete scripts directory
* fix make config

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@73 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 21:12:33 +00:00
Stefan Reinauer
28d001e0f5 Small fix for Ron.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@72 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 19:19:41 +00:00
Stefan Reinauer
16a3503d0d clean up the build system.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@71 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 19:12:14 +00:00
Ronald G. Minnich
11fc6fdf71 Fix bug, add two new functions.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@70 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 13:45:13 +00:00
Ronald G. Minnich
f6a9c4961f Add the device support code from V2. For each file, add a standard GPL
header

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@69 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-22 13:43:51 +00:00
Ronald G. Minnich
1492bdbd5c These changes get us past stage0, past stage1, and into the search for a
file in LAR called raminit. 

The intent is that stage0_i586.S would be common for just about all
stage0. It has no includes. We had to go with an ldscript.ld to deal
with the many bugs in binutils. Maybe someday this will change. 

Tested by Ron and Uwe in bochs with debugging. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@68 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-14 17:08:15 +00:00
Ronald G. Minnich
f4d7429c5c Documentation changes that will reflect changes to come in the code.
The documentation changes come first. 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@67 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-07 02:07:26 +00:00
Uwe Hermann
755fba1a45 Fix a bunch of typos (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@66 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-30 14:58:48 +00:00
Uwe Hermann
110c9f7e1c For some files:
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]

(trivial)

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@65 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-30 13:15:04 +00:00
Uwe Hermann
aecc25a2e1 Remove unused dummy options, some cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@64 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-30 11:26:16 +00:00
Uwe Hermann
fb1793faca Add a license header where it was missing.
Use standard LinuxBIOS license header (trivial, no semantic changes).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@63 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-30 11:10:39 +00:00
Stefan Reinauer
c275218a89 Add a first bit of a framework. Builds the following parts, in
accordance to the newboot document:

* reset vector (16 bytes)
* vpd (240bytes)
* boot block (8k - 256b)
* lar archive (256-8 k)

The boot block is kind of simple, still. It enables pmode, car, and
starts looking for an initram module in the lar archive.

Note: This doesnt do much at the moment,
as gas seems to produce buggy code in init.S.

Take this as a suggestion of how it might work and please provide
patches fixing it and bringing it into shape.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@62 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-29 22:09:50 +00:00
Ronald G. Minnich
e388149797 Simple change to add an extern
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@61 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-26 20:45:10 +00:00
Stefan Reinauer
2b2e9376fe * small Makefile cleanups
* add config.h so the Ron's latest changes build.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@60 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-26 19:33:03 +00:00
Ronald G. Minnich
3b79d32caf This is an incredibly long commit message, but I want it in here as I
expect to hear about this change. Note that Stefan and I have discussed
this change and feel it is at least worth trying. 

Also, please be aware that this change is backed by a
lot of experience with LinuxBIOS users and usage of the last 7 years. 

First I detail changes, then I detail why. 


Major changes for the new config system. 
Selection of object files, and variable setting, is now controlled by
Kconfig. 

There is only one dts now. It is in the mainboard file. It may later 
move to the target file -- we will see. 

The dts is in two parts, seperated by %%. The first part is a 
fairly standard dts, and the dtc will automatically generate a device 
tree from it. The device tree is composed of generic structures. These 
structures are identical to those of the old V2 device tree. All the 
hierarchy and parent/child/sibling relationships appear to be correctly
generated. This means that all the v2 code will work without change. 

For each node in the tree, if the node has a  property named 'config', 
then the dtc will generate a reference to a structure and an include
directive for a path -- much as in the old Config tool. 

Example: here is a fragment of a dts
==========
north {
        config = "northbridge,intel,i440bx";
};

%%

struct northbridge_intel_i440bx_config north = {
        .whatever = 1;
};
===========

The dtc will create:
#include <northbridge/intel/i440gx/config.h>
struct northbridge_intel_i440bx_config north = {
        .whatever = 1;
};

struct device dev_north {
        .chip_ops = &northbridge_intel_i440bx_ops;
        .chip_info = &north;

        .
        .
        .
};

So the programmer specifies the tree structure in dts form, indicates
which devices have a config entry, and sets up the C code for the
config. I have worked with this and am finding it very easy to use. I
think this is the way to go. Plus, we are getting rid of most of the 
include hell of the old Config system. 

Note that the config node is OPTTONAL! If you do not set it then no
structure usage/include will occur. 

WHY? 
Here is my setup for v3. I think this is good. I like it and am
finding it easy to work with.

Basically, the old config system combined makefile generation, tree
generation, and chip struct initialization in one file -- config.lb.

What we need are four things:
1. selection of .c files to build the bios with
2. the device tree -- this is built with generic structures defined in
include/device/device.h
3. The per-chip structures, usually defined in, e.g.,
northbridge/intel/i440bx/chip.h
4. setting of variables such as baud rate, etc.

Again, this was all done in Config.lb, spread all over the place, like this:
config chip.h
object superio.o

This was hard for people. So we moved the makefile stuff out into the
Kconfig system. This change eliminates (1) and (4) above.

OK, what's left? Well, with our plans from last October, we had device
object model tree stuff, AND still had chip struct initialization in
one file. (2) and (3) above. This is tough, because I was fighting the
mapping of DTS stuff to the C code. It was getting just as ugly as the
old Config.lb. I have been struggling with this for months and it just
wasn't going anywhere.

But it's way too hard to set up the device tree by hand -- I've tried
it. OTOH, it's really easy to set up the per-chip stuff by hand --
I've tried that too. I did a search via:
find ~/src/LinuxBIOSv2/src/ -name chip.h -print
and looked at them all. These files are really simple. There's no
reason to get too tricky, as there is nothing worth getting tricky
about. The problem is the device tree, not these simple chip info
structs.

So, here's the solution.

The ONLY dts is in the mainboard directory. There is no equivalent of
Config.lb in the south, north, cpu, all that stuff any more. The
Kconfig and Makefile in those directories replaced the build-related
functions of Config.lb.-- (1) and (4) above.  The only thing left was
chip.h anyway (3) above.

But how can we express the settings in chip.h via the DTS? IT's been
very hard to get this going.

So, here is the trick. The dts in the mainboard directory divides into
two parts. The first part is the standard dts. The second part is the
C code. They are seperated, as in lex and yacc, with a %%.

Here is the dts for qemu (note that the cpus keyword is still not
right, and maybe this structure needs to change; i'm not that worried
about that too much, just the big picture I'm discussing here). Also,
note I'm working with some new properties, e.g. pcipath and pcidomain
-- if these properties exist ina node, then I create initialized
structure members for them. Also see enabled and on_mainboard --
properties, but I catch them and use them.
/{
       cpus {
               config="mainboard,emulation,qemu-i386";
               emulation,qemu-i386@0{
                       enabled;
                       on_mainboard;
                       device_type = "cpu";
                       name = "emulation,qemu-i386";
                       pcidomain = "0";

                       /* the I/O stuff */
                       northbridge,intel,440bx{
                               pcipath = "0,0";
                               southbridge,intel,piix4{
                               };
                       };
               };
       };


};

%%
/* the user sets up these structs */
struct mainboard_emulation_qemu_i386_config cpus = {
               .nothing = 1,
};

You can see the device tree stuff at top. If a given node has a
property named 'config', then that means what the old 'chip' thing
meant in Config.lb. The dtc will generate an #include to pull in a
file with the path name specified in the config property. The dtc will
not set up the per-chip struct, but it will set up a pointer to a
struct when it sets up the device tree. Note that at bottom, it's up
to you to set up the initialized struct. But this was always the easy
part anyway. Instead of wacky pseudo-C like we had in config.lb, we
just do real C. It's easy. Here is what the dtc generates.

#include <device/device.h>
#include <device/pci.h>
#include <mainboard/emulation/qemu-i386/config.h>
struct device dev_southbridge_intel_piix4;
struct device dev_northbridge_intel_440bx;
struct device dev_emulation_qemu_i386_0;
struct device dev_cpus;
struct device dev_root;
extern struct chip_operations mainboard_emulation_qemu_i386_ops;
struct mainboard_emulation_qemu_i386_config cpus = {
.nothing = 1,
};

struct device dev_root = {
       .path =  { .type = DEVICE_PATH_ROOT },
       .links = 1,
       .link = {
               [0] = {
                       .dev = &dev_root,
                       .link = 0,
                       .children = &dev_cpus
               },
       },
       .bus = &dev_root.link[0],
};
struct device dev_cpus = {
       .chip_ops = &mainboard_emulation_qemu_i386_ops,
       .chip_info = &cpus,
       .links = 1,
       .link = {
               [0] = {
                       .dev = &dev_cpus,
                       .link = 0,
                       .children = &dev_emulation_qemu_i386_0
               },
       },
       .bus = &dev_root.link[0],
       .next = &dev_root,
};
struct device dev_emulation_qemu_i386_0 = {
       .enabled = 1,
       .on_mainboard = 1,
       .path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0 }}}
,
       .links = 1,
       .link = {
               [0] = {
                       .dev = &dev_emulation_qemu_i386_0,
                       .link = 0,
                       .children = &dev_northbridge_intel_440bx
               },
       },
       .bus = &dev_cpus.link[0],
       .next = &dev_cpus,
};
struct device dev_northbridge_intel_440bx = {
       .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0,0)}}},
       .links = 1,
       .link = {
               [0] = {
                       .dev = &dev_northbridge_intel_440bx,
                       .link = 0,
                       .children = &dev_southbridge_intel_piix4
               },
       },
       .bus = &dev_emulation_qemu_i386_0.link[0],
       .next = &dev_emulation_qemu_i386_0,
};
struct device dev_southbridge_intel_piix4 = {
       .bus = &dev_northbridge_intel_440bx.link[0],
       .next = &dev_northbridge_intel_440bx,
};



This compiles just fine.

I think this is the right way to go, comments to me.

But, note, IT COMPILES. And it's simple. And, it will work with our
current device tree code!



Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@59 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-26 17:30:40 +00:00
Ronald G. Minnich
8059167040 Some modifications and removal of inflammatory language.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@58 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-01-24 21:09:15 +00:00