Due to some problems with PCI transactions, Geode LX needs the ROM cache properties to be write-serialize + cache disabled by runtime. More details below.
Add mainboard_pre_payload() call to each mainboard as the final coreboot function before the payload is called by stage1.
Note that this patch also grows the bootblock from 16K to 20K to make room for mainboard_pre_payload().
"The problem is a transaction depth issue and bottlenecks inside the GX
and LX that go across PCI. The conditions are very complicated but it
comes down to we need write serialization for writes to PCI. If you
look in the data book you can't have write serialization and the cache
enabled on a given area. During coreboot we don't have to worry about
a write or a PCI bus master so I think we can enable caching the ROM.
After coreboot we can't be sure what will happen in the system so we
need to set it up to be safe. For example flashrom just clears the
write protect bit. If the cache were enabled (no write serialization)
and flashrom was writing the ROM we would be in a precarious position.
A PCI bus master doing a read or a write that has a hit on a tag
would cause enough bottleneck conditions that it might hit the bug. We
could change flashrom but that doesn't help other tools. We need to
leave the system in a safe state. Also, caching the ROM after it is no
longer used doesn't make much sense. So, we need a call just before
the payload runs to clean up the system."
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@573 f3766cd6-281f-0410-b1cd-43a5c92072e9
released new-model VSA code.
Changes:
Index: util/dtc/flattree.c
Add an ID entry for apic properties.
Index: northbridge/amd/geodelx/apic
This is a new dts for the northbridge used as an APIC.
Index: northbridge/amd/geodelx/pci
This is a new dts for the northbridge used as a PCI device.
Index: northbridge/amd/geodelx/geodelx.c
Fix a non-obvious bug: we had set phase3 scan bus for both the
domain AND the PCI device, which is a mistake: can't scan from the
PCI device too.
Index: northbridge/amd/geodelx/domain
This is a new dts for the northbridge used as an pci domain.
Created via svn move dts domain
Index: device/pci_device.c
If there are leftover devices, it is now a warning, not an error,
since there are
some no-pci devices in the tree now. For future: only complain about
leftover PCI devices ...
Index: device/device.c
make devcnt a global and initialize it in init_dev. Add a debug printk.
Index: mainboard/pcengines/alix1c/dts
Add an 'apic' entry for the mainboard. This actually looks pretty clean
to me, the way it went in.
Index: northbridge/amd/geodelx/vsmsetup.c
Delete all pcibios int support, no longer needed for VSA.
Please note that this patch includes Carl-Daniel's improvements
below, which I have Ack-ed.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
A few minor comments. It would be great if you could address them before
committing.
northbridge/amd/geodelx/domain is a copy of northbridge/amd/geodelx/dts.
You probably want to use "svn mv" for that because it preserves history
and the old file was probably intended to have been moved, not copied.
northbridge/amd/geodelx/vsmsetup.c:247: warning: ‘biosint’ defined but
not used
Since the new VSA does not use BIOSINT services anymore, deleting
biosint and related functions from vsmsetup.c would shrink vsmsetup.c by
one fourth. Patch follows (could you merge it into your patch?):
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@571 f3766cd6-281f-0410-b1cd-43a5c92072e9
/config/ = "northbridge/amd/geodelx";
Then the file northbridge/amd/geodelx/dts is read in and processed.
Magic(TM) appends the name "/dts" to the path.
This hack is fine with chips that only do one thing.
But some (all) northbridge parts play several roles: APIC cluster, PCI domain
device, and PCI device. The result is a need for more than one dts, since
there are three possible devices, with three types of IDs, and so on.
To keep things sane, I am proposing to enable multiple dts files in a
directory, names (e.g., nothing required here):
domaindts
pcidts
apicdts
(of course these names can be anything, this is just an example).
This change will require a change to the dtc, since we can no longer
assume just one dts file, and hence need a way to name these different
files.
The proposed change is very simple. We now require the full path name
for the file, and eliminate the Magic(TM).
So,
/config/ = "northbridge/amd/geodelx/pcidts";
will open the pcidts file.
/config/ = "northbridge/amd/geodelx/domaindts";
will open the domain dts.
Maybe we should just call it domain and pci and apic? works for me.
/config/ = "northbridge/amd/geodelx/domain";
/config/ = "northbridge/amd/geodelx/pcibridge";
/config/ = "northbridge/amd/geodelx/apic";
Changes:
dtc.c: create a new function, fopenfile, that will only open a path if it
really is a file. Modify dtc_open_file to use this function. fopenfile
assumes "-" means stdin; should it, or should I move that assumption back
to dtc_open_file?
dtc.h: add prototypes
dtc-parser.y: Given a config path, open the path.
southbridge/amd/cs5536/cs5536.c: example of how C code changes
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Please see the comments below, but they do not have to be addressed for
this commit, just keep them in mind for future commits in that area.
git-svn-id: svn://coreboot.org/repository/coreboot-v3@566 f3766cd6-281f-0410-b1cd-43a5c92072e9
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
done, long term,
is to remove almost all of the vsmsetup.c file and use functions in the
vm86.c file.
The barrier to achieving that goal is the specialized nature of the vga
bios support code vs. the vsm bios support code.
There are a few issues to resolve but what I'd like
to do is get VSA working first, then work out how to merge the rest of
the code.
I have already done some merging at this point.
This code does not yet work. But the board does not work either, and I
want to get the code into the repo in case my hard drive dies.
Makefile: add vmsetup.o
vsmsetup.c: Add this file from v2. Fix copyright and includes.
Remove almost all assembly code in favor of code in vm86.c.
In future, almost all code will be removed and the vm86.c code used
instead.
vm86.c: make some assembly symbols .globl so that vsmsetup.c can use
them.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@560 f3766cd6-281f-0410-b1cd-43a5c92072e9
Remove old vendor,device struct members since we are now using the
device_id struct.
Change declaration of dev_find_device to use device_id struct.
device/device_util.c
Change dev_find_device to use device_id struct instead of vendor, device
parameters.
Add convenience function, dev_find_pci_device, to make it easier for
users.
device/pci_device.c
Change uses of dev->vendor and dev->device to dev->id.
Change prints of dev->vendor, dev->device to use the
dev_id_string function.
device/pci_rom.c
Change uses of dev->vendor and dev->device to dev->id.
southbridge/amd/cs5536/cs5536.c
Change uses of dev_find_device to dev_find_pci_device
southbridge/amd/cs5536/dts
Add pciid of the cs5536
northbridge/amd/geodelx/dts
add pciid of the geodelx northbridge.
util/x86emu/vm86.c
Change uses of dev_find_device to dev_find_pci_device
With these changes, the chipsetinit function now finds the southbridge
in the static tree, which is the first time this has worked in v3.
This success in turn means that the chipsetinit code is running for the
first time.
We are still failing in "Finding PCI configuration type"
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@558 f3766cd6-281f-0410-b1cd-43a5c92072e9
Change the ID constants so they are more useful for debugging.
Instead of simple 1,2,3 they now are a 4-byte value which can be more
useful when looking at memory with a debugger. Lots of variables can be
'1', but fewer variables will match to 'PCID'.
include/device/pci.h:
Include pci_ids.h in pci.h
device/device.c: remove silly comment. Change memcpy to struct assign, this makes it possible
for the C compiler to do type checking. Add assign for the dev->id.
flattree.c: Support the use of 'domainid' and 'pciid' in the per-chip dts. These IDs will be assigned
to the static tree device struct. In conjunction with the earlier patch, this change removes the need
for users to assign the ops struct member in the dts by hand, as it is done in the qemu port today.
The ops struct member will automatically be assigned by the dev_init function, which is run
in stage2 before any actual device code is run. (This change to dev_init was in the previous patch).
Added two comments that document what is going on.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@557 f3766cd6-281f-0410-b1cd-43a5c92072e9
The message appears if a file has not been found in the LAR archive and
is triggered even by lookup routines. Normal capitalization helps
reducing the frightening effect of the message.
Correct a few typos in other areas of the LAR code as well.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@538 f3766cd6-281f-0410-b1cd-43a5c92072e9
dereference or worse) in case the archive length is exactly
sizeof(struct lar_header). Such an archive is invalid because the
filename directly after the LAR header is always dereferenced and has to
be at least 1 byte in the "empty filename" case (only terminating \0).
Improve LAR code documentation and reorder variables in one assignment
to make the code more obvious and readable. This will help people
understand what the code does when they look at it half a year from now.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@506 f3766cd6-281f-0410-b1cd-43a5c92072e9
number from ELF as segment number in the file. This works nicely when
there are no skips (e.g. not PT_LOAD segments, which are discarded).
If one segment is skipped, we get a bump:
normal/payload0/segment0 (27288 bytes, lzma compressed to 14506 bytes @0x64c0)
normal/payload0/segment2 (211136 bytes, lzma compressed to 70905 bytes @0x9dc0)
The LAR loader wont load segment2, and in this particular case, grub2-lb
will only boot into rescue mode (segment0 contains it).
Attached patch adds a counter for segment number in the LAR utility to
solve this bug:
normal/payload0/segment0 (27288 bytes, lzma compressed to 14506 bytes @0x64c0)
normal/payload0/segment1 (211136 bytes, lzma compressed to 70905 bytes @0x9dc0)
Also the eagle eyed can see that I merged in Uwe's multiple-payload
patch into current stage1, which includes the segment support. And this
means that grub2-lb without any hacks works when loaded from LAR segments.
Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@498 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@494 f3766cd6-281f-0410-b1cd-43a5c92072e9
While doing this, we can remove lot of code duplication about searching
the device, which is already done in the parent pci_device.c.
Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@487 f3766cd6-281f-0410-b1cd-43a5c92072e9
Remove a broken proto from a c file.
Fix protos etc. per uwe's request for const where it made
sense.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@485 f3766cd6-281f-0410-b1cd-43a5c92072e9
The system will default to old behaviour. See Kconfig in the root.
I still wish to kill ELF mode very soon, however.
LAR is a very capable format. With two simple extensions, we can use
LAR to replace all that we are using ELF for now. This change can
really make life better:
1. we can use streaming decompress instead of the current "uncompress
elf to memory and then copy segments" approach. So we can get rid of
THIS hardcode:
#define UNCOMPRESS_AREA (0x400000)
2. A simple lar l can show ALL segments, including payload segments
3. It's really easy to see where things will go in memory, and catch problems
4. We can figure out an ELF input file is bogus BEFORE we flash, not
AFTER we flash and try to boot it
5. did I mention streaming decompress?
6. We no longer have to worry about where we decompress the elf in
memory (this problem was causing trouble when the payload was a linux
kernel -- it was so big)
7. Since we have a load address, we can create this lar entry:
normal/cmdline
and specify that it be loaded at a place where linux will find it as
the cmdline.
8. The decision on whether to XIP can be made in the LAR entry, not in
hardcode. For example, if initram needs to be XIP, set the load
address to 0xffffffff. Done.
The change is simple. Add a load address and entry point to the lar
header. Extend the lar tool to parse the elf file and create multiple
lar segments. It looks like this:
normal/payload0 (33192 bytes, lzma compressed to 18088 bytes @0x38
load @0x100000, entry 0x105258)
normal/payload1 (72 bytes, lzma compressed to 47 bytes @0x4718 load
@0x1225a0, entry 0x105258)
normal/option_table (932 bytes @0x4798 load @0, entry 0)
normal/stage2 (33308 bytes, lzma compressed to 15474 bytes @0x4b78
load @0, entry 0)
normal/initram (4208 bytes @0x8828 load @0, entry 0)
linuxbios.bootblock (16384 bytes @0xfc000 load @0, entry 0)
note that the payload is now payload/segment0, payload/segment1, etc. I've extended
linuxbios to look for these. Note that you can now see all the things
that get loaded ;they're no longer hidden in an ELF header somewhere.
Elf failures are gone!
Note that I've left legacy elf support in, for now, but recommend we
get rid of it as soon as possible.
patch attached. This is a first pass. lar.c needs some refactoring but
I want to get the cmdline going. You can now have a linux payload and
it will uncompress with no problems.
This has been tested with filo and BOCHS.
This patch includes ONLY the lar changes, the other changes are next.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@481 f3766cd6-281f-0410-b1cd-43a5c92072e9
and ends at the end of a temporary buffer, which doesn't look
right to me (and segfaults if between those two there's an unmapped
region, as happened here).
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@480 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@477 f3766cd6-281f-0410-b1cd-43a5c92072e9
operations to specify the intended pathname for the blob.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@474 f3766cd6-281f-0410-b1cd-43a5c92072e9
fleshed out the "usage" screen.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@473 f3766cd6-281f-0410-b1cd-43a5c92072e9
operations to specify the intended pathname for the blob.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@471 f3766cd6-281f-0410-b1cd-43a5c92072e9
consolidates
creating and accessing the LAR into new code utilizing mmap which
facilitates moving about within the archive.
This code also turns the bootblock path name as a constant value.
It also requires that the user specify a size when the LAR is
created.
This patch was missing do_no_uncompress() which was fixed before
commit. This part should be reviewed.
Signed-off-by: Jordan crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@470 f3766cd6-281f-0410-b1cd-43a5c92072e9
building in an unconfigured tree and to continue with Jordans patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@469 f3766cd6-281f-0410-b1cd-43a5c92072e9
in the LBv3 tree. Also remove any reference to the build system so that
LAr can be constructed in an un-configured tree.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@468 f3766cd6-281f-0410-b1cd-43a5c92072e9
x86 config). This was tested with gcc 4.1.0 on x86 and gcc 4.2.1 on x86_64.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@466 f3766cd6-281f-0410-b1cd-43a5c92072e9
* statically link linuxbios.initram for now (depends on printk, post_code
and die)
* greatly simplify all makefiles by creating a global Rules.make
* use $(dir $@) in Makefiles instead of absolute paths for mkdir..
* clean up Makefiles by calling components' code locally instead of in the
Makefile. (Remember: one day, no code per mainboard)
* unconditionally create .xcompile in case it changed
* add NM to xcompile
* create $(obj)/linuxbios.map with all symbols of all stages
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@463 f3766cd6-281f-0410-b1cd-43a5c92072e9
- test(1) doesn't understand == on Solaris, but = seems to be equivalent
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@461 f3766cd6-281f-0410-b1cd-43a5c92072e9
returns an error if any part of dirpath is located outside the specified
parent directory. Use the parent "/" to allow new directories anywhere.
Note that dirpath is relative to the working directory, not to parent.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@453 f3766cd6-281f-0410-b1cd-43a5c92072e9
Added check for -fno-stack-protector flag.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@434 f3766cd6-281f-0410-b1cd-43a5c92072e9
Why? This way we don't need to recompile the image when the size of the
LinuxBIOS image changes. This alows building images for 50 motherboards
and equipping each with 10 payloads, resulting in 500 images while you
only have to build each payload once and each motherboard, too.
There's also a small "fix" allowing the compression type to be case
insensitive. Not really relevant I guess.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@427 f3766cd6-281f-0410-b1cd-43a5c92072e9
fine without it. Probably was a test file only (?)
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@422 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@419 f3766cd6-281f-0410-b1cd-43a5c92072e9
* make constructor an initializer.
* fix memory leak/code flow error in current code
* add spinlocking
* drop malloc and use new_device for device allocation instead.
* add CONFIG_SMP as it is needed by spinlocks and soon other stuff.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@418 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@416 f3766cd6-281f-0410-b1cd-43a5c92072e9
Acked-by: Stefan Reinauer <stepan@coresystems.de
This patch adds artec dbe61 support, removes all mainboard.c, and
adds
the code to dtc so that it takes these properties from the top level
dts:
/{
.
.
.
mainboard-vendor = "AMD";
mainboard-part-number = "Norwich";
}
statictree.h will have:
extern const char *mainboard_vendor, *mainboard_part_number;
and statictree.c will have:
const char *mainboard_vendor = "AMD";
const char *mainboard_part_number = "Norwich";
It is an error to NOT have the vendor and part number in the top
level dts.
thanks
ron
Get rid of mainboard.c in all mainboard directories.
Modify dtc so that it creates declarations (in statictree.h) and
generates the char *
for mainboard name and part # (in statictree.c).
Failure to set up a mainboard-vendor
OR mainboard-part-number property in the mainboard dts will get a
helpful and descriptive error message (tested).
This may be a first for the linuxbios config
tools.
Add Georgi's patch for the bug in flattree.c; assign *cp = 0.
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@394 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@368 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Adapt the compression utilities for integration into lar
- Add compression capabilities to lar and expose in user interface
- Provide a way to mark files as non-compressible
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
- Diese und die folgenden Zeilen werden ignoriert --
M include/lar.h
M util/lzma/minilzma.cc
M util/nrv2b/nrv2b.c
M util/lar/lar.c
M util/lar/create.c
M util/lar/lar.h
M util/lar/lib.c
M util/lar/extract.c
M util/lar/list.c
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@366 f3766cd6-281f-0410-b1cd-43a5c92072e9
- lib/console.c: BIOS_SPEW never kicked in.
- util/xcompile/xcompile: the "function" prefix isn't supported by all shells.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@364 f3766cd6-281f-0410-b1cd-43a5c92072e9
"lar -b foo" lar crashes without this. Thanks to Patrick Mauritz for
finding this. (trivial patch)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@363 f3766cd6-281f-0410-b1cd-43a5c92072e9
a hardcoded variable. Pretty much trivial.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@362 f3766cd6-281f-0410-b1cd-43a5c92072e9
tree. Now requires newer flex, 2.5.4 at least.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
M dtc/dtc-lexer.l
M dtc/flattree.c
M dtc/dtc.h
M dtc/livetree.c
M dtc/fstree.c
M dtc/dtc-parser.y
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@361 f3766cd6-281f-0410-b1cd-43a5c92072e9
by the previous patch.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@358 f3766cd6-281f-0410-b1cd-43a5c92072e9
