The new config choice is called RUN_FSP_GOP. Some things had to happen
on the road:
* Drop confusing config GOP_SUPPORT,
* Add HAVE_FSP_GOP to chipsets that support it,
* Make running the GOP an option for FSP2.0 by returning 0
in random VBT getters.
BUG=none
BRANCH=none
TEST=none
Change-Id: Icf0e46a75e0440c458f554de748d2e979dfffa30
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 2e7f6ccafc
Original-Change-Id: I92f88424004a4c0abf1f39cc02e2a146bddbcedf
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/19815
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533093
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.
Unfortunately, some external websites and projects are spelling coreboot
with an uppercase C, so references to those pages can't be changed
without breaking the link.
BUG=none
BRANCH=none
TEST=none
Change-Id: I577e92745dcb9a85b09b6ac77f247801b4b37086
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 4b18a922f0
Original-Change-Id: I79824da8a9ed36a1e4fe23a1711a89535267bf5f
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/20031
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://chromium-review.googlesource.com/531719
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.
Run the command below to replace all occurences.
```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```
BUG=none
BRANCH=none
TEST=none
Change-Id: I881e55138a6114c67585ce37d4d719fe2626b83a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: a8843dee58
Original-Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Original-Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-on: https://review.coreboot.org/20034
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/528256
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: I6ec991d905e16f79eaa162f07c79c1c0f8b85a61
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: b40e5c72b7
Original-Change-Id: Ieeb53a1694193cd19b5e9aa5bee25e36a60e56bd
Original-Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/19054
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/528187
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
www.coreboot.org/Documentation is now built with hugo (www.gohugo.io)
based on files in this repo's /Documentation directory.
Also clarify that new additions to Documentation are under CC-BY 4.0 terms.
BUG=none
BRANCH=none
TEST=none
Change-Id: Iedadababa4129d983118eb9a59f93d3fa3a4bb0c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 04edaefad7
Original-Change-Id: I000e15b29a182bb88b40de3d0178bf8cc54ba8af
Original-Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Reviewed-on: https://review.coreboot.org/19881
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/517924
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
The original document was written and committed with no regard to line
lengths. This makes it easier to write. Now it needs to be easier to
read, so wrap the lines at 80 characters where possible.
- A couple of headings had to be rewritten to keep them under 80
characters. This required the addition of a new paragraph that had
the old header.
- Remove URL text that was just duplicating the URL.
- All other text is the same, just wrapped.
BUG=none
BRANCH=none
TEST=none
Change-Id: I6c450c36dea4ae5eb6bbaf7fdb46d6b57d475137
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ccfea16cd4
Original-Change-Id: I44833c28750714fccb87296868c1ff78ab7f1d07
Original-Signed-off-by: Martin Roth <gaumless@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/19076
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/475712
- Remove document history. Since the document is now stored in git,
this is no longer needed.
- Fix spacing for the kconfig_lint help output
- Add license information to the bottom of the document.
BUG=none
BRANCH=none
TEST=none
Change-Id: I1fb84911b132df03a5d6177dafa7d7f92939c749
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0090192ddd
Original-Change-Id: I9854602a6ad9b4a99bf3988e1d7662b3b426e608
Original-Signed-off-by: Martin Roth <gaumless@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/19075
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/468726
Create a doxygen target that builds documentation just for the platform
that is currently selected in Kconfig. This gives us something that is
much more useful to most people.
BUG=none
BRANCH=none
TEST=none
Change-Id: I898a4044b8f42388a4b4bf82db762ef79ad69309
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b1574e3b4a
Original-Change-Id: I25c3cdac2dd383b89df6389ba9011dac913a0a9b
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/15577
Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/459668
In order to allow GPIOs to be set/clear according to their polarity,
provide helper functions that check for polarity and call set/clear
SoC functions for generating ACPI code.
BUG=None
BRANCH=None
TEST=Verified that the ACPI code generated remains the same as before
for reef.
Change-Id: I0857d9e5625eca339f6185acea204fcfba901d25
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bf4845dd3a
Original-Change-Id: Ie8bdb9dc18e61a4a658f1447d6f1db0b166d9c12
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18427
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/445821
This document provides information about the different functions that a
driver can use for generating ACPI code for toggling GPIO. These
functions are expected to be implemented by the SoC. It also defines the
different constraints on use of Local variables in ACPI code while
implementing these functions.
BUG=chrome-os-partner:55988
BRANCH=None
TEST=None
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17128
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: Ibc03d766afb6d7b75bc0dc9f79920b561f1c4a78
Reviewed-on: https://chromium-review.googlesource.com/404984
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Specify the memory initialization parameters in
mainboard/intel/galileo/devicetree.cb. Pass these values into FSP to
initialize memory.
TEST=Build and run on Galileo Gen2
BUG=None
BRANCH=None
TEST=None
Change-Id: I83ee196f5fb825118a3a74b61f73f3728a1a1dc6
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/15260
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359317
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Add table containing feature documentation:
* Feature name with link to specification or documentation
* Linux utility name with link to utility documentation
* EDK-II utility name with link to utility documentation
BUG=None
BRANCH=None
TEST=None
Change-Id: Ie33d8563320697c12b34974286bffcadf92c016e
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/15256
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359315
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Add the initial index.html file. The web server is currently not
converting .md files into html. Instead they are being downloaded in
their raw .md file format. Use the index.html file to enable the
web server to find and process the file.
TEST=None
BUG=None
BRANCH=None
TEST=None
Change-Id: I27334ccacdb34b56946a9061132acf2808d32175
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/15218
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359314
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Add link for TI TS5A23159 specification.
TEST=None
Change-Id: I2756ded963fc7597e4db1fa151bf62630b1108d9
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/15003
Original-Reviewed-by: Martin Roth <martinroth@google.com>
(cherry-picked from commit 2a8cc3064e)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/348419
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
index.html:
* Separate the sections on the main page
* Move the documentation links to the main page
* Add links for FSP 1.0 and 2.0 specifications
* Add link for UEFI specifications
* Add link to MinnowBoard MAX coreboot
fsp1_1.html:
* Use Integration instead of Documentation
SoC/quark.html:
* Move documentation to main page
* Update build instructions for CorebootPayloadPkg
* Remove FatPkg since it is now part of edk2 tree
* Add source location for QuarkFspPkg
* Add build instructions for QuarkFspPkg
TEST=None
Change-Id: I48bd1bf98a6d8bc43bdd3b4c51dfd119a1e0f61b
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/14882
Original-Reviewed-by: Martin Roth <martinroth@google.com>
(cherry-picked from commit 2d96be6484)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346628
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The FLASHMAP_OFFSET config variable is used in lib/fmap.c, however
the fmdtool creates a fmap_config.h with a FMAP_OFFSET #define.
Those 2 values are not consistent. Therefore, remove the Kconfig
variable and defer to the #define generated by fmdtool.
Change-Id: Ib4ecbc429e142b3e250106eea59fea1caa222917
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14765
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Document how to test TempRamExit and verify the MTRR setup and loading.
TEST=None
Change-Id: I57a604fa139edac4b05453547d3caf185db491e0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14113
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Add datasheet links for the components supporting GPIO. This includes
I2C I/O ports, I2C PWMs, bus buffers and multiplexers.
TEST=None
Change-Id: I0a1d222d6f9bdbd824b78edf2338cd797e83ebba
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14114
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Add documentation on disabling the SPI flash which is mapped (shadowed)
into the x86 address space at 0x000e0000 - 0x000fffff.
TEST=None
Change-Id: I1d94d84c6cade97886a3274a7e7403f7b3275c5a
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14112
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Add a link to the "Driver Writer's Guide" and a link to the "EDK II
firmware for Intel Quark SoC X1000" document.
TEST=None
Change-Id: I8d629d06accfe24a0b8971b5b5868849587c3db7
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13893
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Add a link to "Making a bootable SD card"
TEST=None
Change-Id: I5682fdd51a4ba37f97ad35475e11d9843f1498fb
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13892
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Add more documentation on the features that the EDK-II
CorebootPayloadPkg is using. Add 8254 and 8259 documentation
links. Add EDK-II documentation links.
TEST=Boot CorebootPayloadPkg to shell prompt
Change-Id: I66df1be0ba908b51b5ddb44a8671b2d7bdb46493
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13851
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Add a link to the ACPI specification.
Update the FADT table to better describe the use and ACPI specification
reference for the various fields.
TEST=None
Change-Id: I77cd925800d71398be6d677de48874099ea26479
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13765
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Update the documentation to add the minimal ACPI support. Also add
TempRamExit entry to the FSP features table.
TEST=None
Change-Id: I7a4576d58005a0b6834188dfeca97f1683d03cb0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13757
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Update the build instructions for CorebootPayloadPkg to target the
Galileo Gen2 platform.
TEST=Build and run on the Galileo Gen2 platform.
Change-Id: I9ca8a67811eff988f81f04d4c01c77115356c050
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13756
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Add documentation on:
* FSP Silicon Init
* How to start the x86 device tree processing for ramstage
* Disabling the PCI devices
* Generic PCI device drivers
* Memory map support
TEST=None
Change-Id: If8f729a0ea1d48db4d5ec1d4ae3ad693e9fe44f0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13718
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Document the Linux build instructions for EDK2.
TEST=Build EDK2 for Quark on Ubuntu 14.04
Change-Id: I5f87eb2c5879f2fd4dd18880908756089a0c7a51
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13644
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Document how to add the sleep state and minimal memory setup.
TEST=None
Change-Id: Ibebeef34269dbf2366f1bea6d734f6bade4e4028
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13446
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Document the steps necessary to enable serial output
TEST=None
Change-Id: Ifc0e700d7ef54fb1e28ca9bca34b94cccd3633ac
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13444
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Document how to add the FSP binary to the SPI flash image.
TEST=None
Change-Id: I51b16600ea69853240282ac2eb0d84935b8e2a71
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13442
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Fix links to the documenation.html page which was renamed from
x86Documenation.html.
TEST=Verified documentation links and searched for x86Documenation.html
Change-Id: Icee79bab4c05ac9b8010dc7acdde8dd5e2ab2909
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13592
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Document what is involved with adding the bootblock support.
TEST=None
Change-Id: I6c8cc38e1b9346b4962588b33ca5e4ab8eac24c3
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13441
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Document the required files to perform a minimal coreboot/FSP build for
x86.
TEST=None
Change-Id: I65b2947114634fce982ce82fb7c577fd5f47ed10
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13438
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This is more tribal knowledge that I don't think I've seen written down
anywhere else. It's not a huge issue, but when looking through the git
log, it helps to be able to differentiate the information from the old
gerrit with the information from the new one.
Change-Id: I7993bda1e9aab79dc26940aaba9ddc52382ed0df
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12804
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
As the community has grown, so has the need to formalize some of the
guidelines that the community lives by. When the community was small,
it was easy to communicate these things just from one person to another.
Now, with more people joining the community every day, it seems that
it's time to write some of these things down, allowing people to
understand our policies immediately instead of making them learn our
practices as they make mistakes.
As it says in the document:
The following rules are the requirements for behavior in the coreboot
codebase in gerrit. These have mainly been unwritten rules up to this
point, and should be familiar to most users who have been active in
coreboot for a period of time. Following these rules will help reduce
friction in the community.
Change-Id: If80e933fcfb04b86fd5efe6423cda448118d7a3c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12256
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
The previous LinuxBIOS-AMD64.tex was still working with subversion.
We need a document to give the preliminary steps to build coreboot
for a new guys.
Change-Id: I64240c8344456e724f0823680e0534cf1db4c4a8
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/4510
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.
This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.
Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
[pg: removed discussion of timestamp internals that isn't current anymore in
favor of some notes for users: when to run which function, what _not_ to do.
Also moved to markdown-ish layout. Will do further style cleanups later.]
BUG=chrome-os-partner:32973
BRANCH=None
TEST=None
Change-Id: I6ea7237f2fa749ce3a493f378f9937e642f3b678
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 97e2a3ebd9552c2a91d9ea62be515059428631cb
Original-Change-Id: I4b184ffad6fcd93d63343a9bca34ad013e9d4263
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/229861
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10741
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
