were bridges as separate links. There isn't a board in v3 that needs multiple
links yet.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@1079 f3766cd6-281f-0410-b1cd-43a5c92072e9
device/pci_device.c:
Only update IDs if:
- The device is on the mainboard
- The device has a Vendor ID and Device ID
- The device has a set_subsystem function in ops_pci(dev)
util/dtc/flattree.c:
Make devices from the dts be on_mainboard.
If they're plugged in, they shouldn't be in the dts.
mainboard/amd/serengeti/dts:
Add subsystem_vendor and subsystem_device.
Build tested on Serengeti. Getting closer :)
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@1045 f3766cd6-281f-0410-b1cd-43a5c92072e9
This fixes one of the errors from using bison-2.4, but there are more.
This one in details is the following error:
BISON build/util/dtc/dtc-parser.tab.c
HOSTCC build/util/dtc/dtc-parser.tab.o
/home/leio/dev/coreboot-v3/util/dtc/dtc-parser.y: In function ‘yyuserAction’:
/home/leio/dev/coreboot-v3/util/dtc/dtc-parser.y:154: error: expected ‘;’ before ‘}’ token
make: *** [/home/leio/dev/coreboot-v3/build/util/dtc/dtc-parser.tab.o] Error 1
Note that 2.4.1 might be made to still work without the semi-colon for some languages, but I
understand 2.5 then still won't work without one. As it builds fine with this change with
bison-2.3, it should be safe to just add the semicolon.
The remaining error is the following:
/home/leio/dev/coreboot-v3/util/dtc/dtc-lexer.l: In function ‘yylex’:
/home/leio/dev/coreboot-v3/util/dtc/dtc-lexer.l:73: error: ‘yylval’ undeclared (first use in this function)
/home/leio/dev/coreboot-v3/util/dtc/dtc-lexer.l:73: error: (Each undeclared identifier is reported only once
/home/leio/dev/coreboot-v3/util/dtc/dtc-lexer.l:73: error: for each function it appears in.)
dtc-parser.tab.h doesn't seem to get an "extern YYSTYPE yylval" declaration, which per documentation should
only happen for pure parser cases ("%define api.pure"), but I can't find any such declaration in dtc to cause
the problem.
Note that upstream dtc builds fine with bison-2.4
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@1004 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@938 f3766cd6-281f-0410-b1cd-43a5c92072e9
multiple links. The way this was done in v2 was a big confusing; this way is
less so.
The changes are easy. Getting them right has been hard :-)
First, for a k8 north that has three links, you can name each one as follows:
pci0@18,0
pci1@18,0
pci2@18,0
We have to have the same pcidevfn on these because that is how the k8 works.
But the unit numbers (pci0, pci1, etc.) distinguish them.
The dts will properly generate a "v3 device code"
compatible static tree that puts the links in the right place in the
data structure.
The changes to dts are trivial.
As before, dts nodes with children are understood to be a bridge.
But what if there is a dts entry like this:
pci1@18,0 {/config/("northbridge/amd/k8/pci");};
This entry has no children in the dts.
How does dt compiler know it is a bridge? It can not know unless
we add information to the dts for that northbridge part.
To ensure that all bridge devices are detected, we support the following:
if a dts node for a device has a bridge property, e.g.:
{
device_operations = "k8_ops";
bridge;
};
The dt compiler will treat it as a bridge whether it has children or not.
Why would a device not have children? Because it might be attached to a
pci or other socket, and we don't know at build time if the socket is empty,
or what might be in the socket.
This code has been tested on dbe62 and k8 simnow, and works on each.
It is minimal in size and it does what we need. I hope it resolves our
discussion for now. We might want to improve or change the device code
later but, at this point, forward motion is important -- I'm on a deadline for
a very important demo Oct. 22!
Also included in this patch are new debug prints in k8 north.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@865 f3766cd6-281f-0410-b1cd-43a5c92072e9
dtc only uses dev_fn as identifier for a PCI device. That gets us a name
collision if we have the same dev_fn combination on multiple buses.
Either we add a random unique ID to the struct name or we integrate the
path to the parent device as well.
I decided to go for integration of parent device path.
With the following device tree
/{
cpus {};
domain@0 {
bus@0 {
pci@0,0 {
};
pci@1,1 {
};
pci@f,0 {
bus@1 {
pci@0,0 {
};
};
};
};
};
};
we get the old names:
dev_root
dev_cpus
dev_domain_0
dev_bus_0
dev_pci_0_0
dev_pci_1_1
dev_pci_f_0
dev_bus_1
dev_pci_0_0 COLLISION!!!
and the new names:
dev_root
dev_cpus
dev_domain_0
dev_domain_0_bus_0
dev_domain_0_bus_0_pci_0_0
dev_domain_0_bus_0_pci_1_1
dev_domain_0_bus_0_pci_f_0
dev_domain_0_bus_0_pci_f_0_bus_1
dev_domain_0_bus_0_pci_f_0_bus_1_pci_0_0
Ron would like shorter names because they only have to be
machine-readable. That's left for another patch.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@860 f3766cd6-281f-0410-b1cd-43a5c92072e9
Fix the bus location for Qemu IDE.
This patch only provides the needed infrastructure for per-device
subsystem IDs, it does not hook them up to the PCI core yet, so this
patch is a no-op.
By the way, the on_mainboard property is activating lots of completely
untested code paths in v3, so someone might want to audit them.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@844 f3766cd6-281f-0410-b1cd-43a5c92072e9
This is managed by stripping the .dtc from the name when it
is used to label the node in the tree.
This one's for you Peter!
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@740 f3766cd6-281f-0410-b1cd-43a5c92072e9
readability. Move to anonymous unions.
Build tested on all targets. Boot tested on qemu.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Ron tested this and it boots to Linux.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@730 f3766cd6-281f-0410-b1cd-43a5c92072e9
2. Fix trivial bug in dtc -- ioport is 6 chars long, not 3
3. Fix all dts so that the @ parts are now in hex.
4. fix graphics mem in dbs62 to be 16 MB, per artec.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@700 f3766cd6-281f-0410-b1cd-43a5c92072e9
is the logical continuation of r416 which happened a year ago.
As an added bonus, we now have consistent naming again, making grepping
the source for dts properties possible.
Build tested on all targets. Patch attached for Gmail users.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@697 f3766cd6-281f-0410-b1cd-43a5c92072e9
mainboard-name naming has been postponed because it's not clear what the
real name should be.
Generated code is identical to the state before the patch.
Compile tested.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@694 f3766cd6-281f-0410-b1cd-43a5c92072e9
Compile tested including boundary cases.
Runtime tested on dbe62 by Ron. Works fine.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@693 f3766cd6-281f-0410-b1cd-43a5c92072e9
Thanks to Carl-Daniel for spotting this one, and Segher for providing the solution right away.
This is a trivial patch.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@667 f3766cd6-281f-0410-b1cd-43a5c92072e9
This is necessary for the 'unwanted_vpci' field on geode-based boards.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@661 f3766cd6-281f-0410-b1cd-43a5c92072e9
code boots and works on qemu and
alix1c. It represents a huge change and a huge improvement. There are a
few fixes left to do, which
will come once this is in.
This change started out easy: get the device IDs OUT of the the dts, and
into one place. We
decided the device IDs should be in the constructors ONLY. To make a
long story short, that just did
not work out, and it revealed a flaw in the design. The result?
- no more ids in the various dts files.
- the constructor struct is gone -- one less struct, nobody liked the
name anyway
- the device_operations struct now includes the device id.
- constructor property no longer used; use device_operations instead.
- lpc replaced with ioport
All the changes below stem from this "simple" change.
I am finding this new structure much easier to work with. I hope we're
done
on this for real, however!
TODO:
1. Change limitation in dtc that makes it hard to use hex in pci@
notation.
Now for the bad news. Sometime today, interrupts or io or something
stopped working between r596 and r602 -- but I did no commits at
that point. So something has gone wrong, but I don't think it's this
stuff.
I did try a build of HEAD, and it fails really, really badly. Much
more badly than this fails, so I think this commit is only going
to improve things. It does work fine on qemu, fails on alix1c,
so I suspect one of today's "clean up commits" broke something.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@603 f3766cd6-281f-0410-b1cd-43a5c92072e9
in dts. This gets rid of the ugly pcipath etc. properties.
So, instead of
somedevice {pcipath="1,0";};
We say pci@1,0{ etc. etc. };
As per my agreement I agree to document this in the design doc.
The alix1c compiles but is untested, and will probably need some work.
I will do these additional tasks on friday.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
M include/device/path.h
Add LPC path type, replacing SUPERIO path type, since SUPERIO is only
one type of LPC. Clean up tabbing in parts of the file (cosmetic).
M mainboard/emulation/qemu-x86/dts
Modify this dts for the new path naming scheme.
M device/pci_device.c
Change what used to be a BIOS_ERR (but is no longer) to a BIOS_NOTICE.
The change is that the device tree includes more than just PCI devices,
so finding a non-PCI device is no longer fatal; a notice is useful.
M device/device_util.c
Add string creation for PCI_BUS nad LPC.
M northbridge/intel/i440bxemulation/dts
Add ID info for the chip.
M northbridge/intel/i440bxemulation/i440bx.c
Change initialization so it is explicitly for the .ops struct member.
M util/dtc/flattree.c
Add support for the new path naming scheme.
I'm in the middle of this commit so I'll fix the hard-coded lengths
next commit.
Also delete dead code between #if 0 and /* and //
M util/x86emu/vm86.c
comment out unused variables. these may someday be use, not ready
to delete them yet.
M Makefile
Change -O2 to -g. We need debugging on LAR far more than we need performance.
git-svn-id: svn://coreboot.org/repository/coreboot-v3@593 f3766cd6-281f-0410-b1cd-43a5c92072e9
released new-model VSA code.
Changes:
Index: util/dtc/flattree.c
Add an ID entry for apic properties.
Index: northbridge/amd/geodelx/apic
This is a new dts for the northbridge used as an APIC.
Index: northbridge/amd/geodelx/pci
This is a new dts for the northbridge used as a PCI device.
Index: northbridge/amd/geodelx/geodelx.c
Fix a non-obvious bug: we had set phase3 scan bus for both the
domain AND the PCI device, which is a mistake: can't scan from the
PCI device too.
Index: northbridge/amd/geodelx/domain
This is a new dts for the northbridge used as an pci domain.
Created via svn move dts domain
Index: device/pci_device.c
If there are leftover devices, it is now a warning, not an error,
since there are
some no-pci devices in the tree now. For future: only complain about
leftover PCI devices ...
Index: device/device.c
make devcnt a global and initialize it in init_dev. Add a debug printk.
Index: mainboard/pcengines/alix1c/dts
Add an 'apic' entry for the mainboard. This actually looks pretty clean
to me, the way it went in.
Index: northbridge/amd/geodelx/vsmsetup.c
Delete all pcibios int support, no longer needed for VSA.
Please note that this patch includes Carl-Daniel's improvements
below, which I have Ack-ed.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
A few minor comments. It would be great if you could address them before
committing.
northbridge/amd/geodelx/domain is a copy of northbridge/amd/geodelx/dts.
You probably want to use "svn mv" for that because it preserves history
and the old file was probably intended to have been moved, not copied.
northbridge/amd/geodelx/vsmsetup.c:247: warning: ‘biosint’ defined but
not used
Since the new VSA does not use BIOSINT services anymore, deleting
biosint and related functions from vsmsetup.c would shrink vsmsetup.c by
one fourth. Patch follows (could you merge it into your patch?):
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@571 f3766cd6-281f-0410-b1cd-43a5c92072e9
/config/ = "northbridge/amd/geodelx";
Then the file northbridge/amd/geodelx/dts is read in and processed.
Magic(TM) appends the name "/dts" to the path.
This hack is fine with chips that only do one thing.
But some (all) northbridge parts play several roles: APIC cluster, PCI domain
device, and PCI device. The result is a need for more than one dts, since
there are three possible devices, with three types of IDs, and so on.
To keep things sane, I am proposing to enable multiple dts files in a
directory, names (e.g., nothing required here):
domaindts
pcidts
apicdts
(of course these names can be anything, this is just an example).
This change will require a change to the dtc, since we can no longer
assume just one dts file, and hence need a way to name these different
files.
The proposed change is very simple. We now require the full path name
for the file, and eliminate the Magic(TM).
So,
/config/ = "northbridge/amd/geodelx/pcidts";
will open the pcidts file.
/config/ = "northbridge/amd/geodelx/domaindts";
will open the domain dts.
Maybe we should just call it domain and pci and apic? works for me.
/config/ = "northbridge/amd/geodelx/domain";
/config/ = "northbridge/amd/geodelx/pcibridge";
/config/ = "northbridge/amd/geodelx/apic";
Changes:
dtc.c: create a new function, fopenfile, that will only open a path if it
really is a file. Modify dtc_open_file to use this function. fopenfile
assumes "-" means stdin; should it, or should I move that assumption back
to dtc_open_file?
dtc.h: add prototypes
dtc-parser.y: Given a config path, open the path.
southbridge/amd/cs5536/cs5536.c: example of how C code changes
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Please see the comments below, but they do not have to be addressed for
this commit, just keep them in mind for future commits in that area.
git-svn-id: svn://coreboot.org/repository/coreboot-v3@566 f3766cd6-281f-0410-b1cd-43a5c92072e9
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
Change the ID constants so they are more useful for debugging.
Instead of simple 1,2,3 they now are a 4-byte value which can be more
useful when looking at memory with a debugger. Lots of variables can be
'1', but fewer variables will match to 'PCID'.
include/device/pci.h:
Include pci_ids.h in pci.h
device/device.c: remove silly comment. Change memcpy to struct assign, this makes it possible
for the C compiler to do type checking. Add assign for the dev->id.
flattree.c: Support the use of 'domainid' and 'pciid' in the per-chip dts. These IDs will be assigned
to the static tree device struct. In conjunction with the earlier patch, this change removes the need
for users to assign the ops struct member in the dts by hand, as it is done in the qemu port today.
The ops struct member will automatically be assigned by the dev_init function, which is run
in stage2 before any actual device code is run. (This change to dev_init was in the previous patch).
Added two comments that document what is going on.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@557 f3766cd6-281f-0410-b1cd-43a5c92072e9
* statically link linuxbios.initram for now (depends on printk, post_code
and die)
* greatly simplify all makefiles by creating a global Rules.make
* use $(dir $@) in Makefiles instead of absolute paths for mkdir..
* clean up Makefiles by calling components' code locally instead of in the
Makefile. (Remember: one day, no code per mainboard)
* unconditionally create .xcompile in case it changed
* add NM to xcompile
* create $(obj)/linuxbios.map with all symbols of all stages
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@463 f3766cd6-281f-0410-b1cd-43a5c92072e9
fine without it. Probably was a test file only (?)
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@422 f3766cd6-281f-0410-b1cd-43a5c92072e9
* make constructor an initializer.
* fix memory leak/code flow error in current code
* add spinlocking
* drop malloc and use new_device for device allocation instead.
* add CONFIG_SMP as it is needed by spinlocks and soon other stuff.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@418 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@416 f3766cd6-281f-0410-b1cd-43a5c92072e9
Acked-by: Stefan Reinauer <stepan@coresystems.de
This patch adds artec dbe61 support, removes all mainboard.c, and
adds
the code to dtc so that it takes these properties from the top level
dts:
/{
.
.
.
mainboard-vendor = "AMD";
mainboard-part-number = "Norwich";
}
statictree.h will have:
extern const char *mainboard_vendor, *mainboard_part_number;
and statictree.c will have:
const char *mainboard_vendor = "AMD";
const char *mainboard_part_number = "Norwich";
It is an error to NOT have the vendor and part number in the top
level dts.
thanks
ron
Get rid of mainboard.c in all mainboard directories.
Modify dtc so that it creates declarations (in statictree.h) and
generates the char *
for mainboard name and part # (in statictree.c).
Failure to set up a mainboard-vendor
OR mainboard-part-number property in the mainboard dts will get a
helpful and descriptive error message (tested).
This may be a first for the linuxbios config
tools.
Add Georgi's patch for the bug in flattree.c; assign *cp = 0.
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@394 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@368 f3766cd6-281f-0410-b1cd-43a5c92072e9
a hardcoded variable. Pretty much trivial.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@362 f3766cd6-281f-0410-b1cd-43a5c92072e9
tree. Now requires newer flex, 2.5.4 at least.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
M dtc/dtc-lexer.l
M dtc/flattree.c
M dtc/dtc.h
M dtc/livetree.c
M dtc/fstree.c
M dtc/dtc-parser.y
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@361 f3766cd6-281f-0410-b1cd-43a5c92072e9
where &> isn't supported by /bin/sh (eg. solaris) and "fixes"
the dtc Makefile in the same manner.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@316 f3766cd6-281f-0410-b1cd-43a5c92072e9
compilation of dtc-parser.tab.c
The issue is &> which seems to be parsed differently by $SHELL (/bin/sh)
here - as "& >", ie. background + reroute output
I push stderr into a separate file now to avoid any trouble
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@311 f3766cd6-281f-0410-b1cd-43a5c92072e9
which just includes those two files on linux, and provides a
compatibility wrapper on Solaris, with room for other systems.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@309 f3766cd6-281f-0410-b1cd-43a5c92072e9
build, and also creates the target directory if not done yet. This fixes
a race-like issue I have with make sometimes trying to compile
dtc-parser.tab.c before bison finished execution. I have no idea why it
fixes things, but it seems to do, and does no harm otherwise.
Also, documenting this step is just The Right Thing[tm] in my opinion.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@300 f3766cd6-281f-0410-b1cd-43a5c92072e9
commented-out code from stage0_i586.S. I am leaving the warnings about
gnu bintools in stage0_i586.S, just to make sure everyone knows why
some of the code is written the way it is, and nobody makes a mistake
in two years ...
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@244 f3766cd6-281f-0410-b1cd-43a5c92072e9
are used to from the Linux kernel.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@243 f3766cd6-281f-0410-b1cd-43a5c92072e9
further. It is only tested with my Kconfig build dir fixes applied.
Not sure how pretty this is. All the mkdirs increase build time by 0.2s,
so it looks a lot more nasty than it actually is. If wishes, we can create the
whole directory structure below build in the "prepare" target. It's not faster,
but more limited to one place.
The next step could be to spread out *_LIB_OBJ to lib/Makefile. in which case
it is nice that you can just write object.o instead of $(obj)/object.o or
$(obj)/lib/object.o ...
The top level modules (initram, stage0, stage2, ..) are still in $(obj).
So are the northbridge and southbridge object files - These require some more
cleanup anyways, as they're defined in the mainboard Makefile.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@242 f3766cd6-281f-0410-b1cd-43a5c92072e9
This tree shows the new model. It demonstrates the constructor array
in use, for devices that are and are not specified in the dts. It
introduces a new generic structure, device_id, analogous to
device_path, which can describe all the types of device IDs we have.
It shows a way to set up arrays of structs, in the dts, for the
constructors, so we avoid ldscript hacks.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@233 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@202 f3766cd6-281f-0410-b1cd-43a5c92072e9
code (This goes hand in hand, as some parts of serial were hardcoded
to one architecture until now)
* include/uart8250.h: add TTYSx defines that are used in
multiple places. formerly part of arch/x86/serial.c.
Drop init_uart8250 (unused)
* lib/uart8250.c: drop arch/x86/config.h usage
Drop init_uart8250 (unused)
* arch/powerpc/Kconfig, arch/x86/Kconfig: add CONFIG_ARCH to
contain the directory name under LinuxBIOSv3/arch/
* arch/x86/console.c: drop some dead code. Drop hardcoded config.h values.
use generic uart8250.h header
* arch/x86/cachemain.c: Drop hardcoded config.h values. Still use hardcoded
ROM size for now. (To be changed later)
* arch/x86/config.h: dropped, no longer needed
* arch/x86/serial.c: factor out generically used defines to uart8250.h
* Makefile: use mainboard architecture instead of target architecture to choose
include path.
Read .xcompile if available (configure replacement).
Create build.h with compile time and version.
* util/xcompile/xcompile: new file. Search for supported cross compilers
linkers, assemblers (and potentially supported compiler flags etc)
This is a very slick configure replacement.
* util/dtc/Makefile: fix Makefile for cross compilation
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@190 f3766cd6-281f-0410-b1cd-43a5c92072e9
add debug printks.
make dtc put 'root' as the first_node, instead of making the last node
be the first node .... much happier in linuxbios.
sprintf is broken ... dammit. I hope someone will fix it. I've got about
another week of full-time I can spend on this and then I go back to part
time. So I'm going to need some help soon.
other fixups, and also, make the dts conform to the needs of the device
tree. So we have a domain0 and a device (0,0) that is the north.
Mostly things are working, but we're STILL not getting any memory in the
LB tables from the north. The device tree is a bitch.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@175 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@172 f3766cd6-281f-0410-b1cd-43a5c92072e9
Phase 1: done
Phase 2: early setup ...
Phase 2: done
Phase 3: Enumerating buses...
qemu-x86 enable_dev done
dev_phase3_scan: scanning Root Device
scan_static_bus for root(Root Device)
cpus: Unknown device path type: 0
cpus() enabled
i440bxemulation_enable_dev:
i440bxemulation_enable_dev: DONE
northbridge_intel_i440bxemulation() enabled
northbridge_intel_i440bxemulation() scanning...
dev_phase3_scan: scanning
pci_scan_bus start
PCI: pci_scan_bus for bus 00
PCI: scan devfn 0x0 to 0xff
PCI: devfn 0x0
PCI: pci_scan_bus pci_scan_get_dev returns dev <NULL>
Change dts compiler to emit a new struct member, dtsname, for devices,
so we can get actual useful names for things.
Several mods and printks added.
printk(BIOS_SPEW
gives no output for reasons I don't understand.
Next in line is bringing back v2 support for pci, but not doing it the
way v2 does it.
note the cpus() printk above. cpus don't have a valid path yet.
We still need to work out the dts syntax for systems with multiple links
(opteron)
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@163 f3766cd6-281f-0410-b1cd-43a5c92072e9
If this is a hard OFW limitation, let's fix OFW.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@161 f3766cd6-281f-0410-b1cd-43a5c92072e9
