The VIA C7 CAR disable code in v3 had a nasty bug which caused the

processor to reset. Fix this bug and actually disable CAR.
With this patch v3 has better C7 CAR code than v2 (which skips two key
MTRRs).

Thanks to Corey Osgood for testing countless debug patches.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1010 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-11-13 00:04:55 +00:00
parent d83abdaf6f
commit fbff7d2fd0

View file

@ -56,22 +56,20 @@ void disable_car(void)
__asm__ __volatile__(
" movl %[newesp], %%esp \n"
#if ENABLE_BROKEN_CAR_DISABLING
/* We don't need cache as ram for now on */
/* disable cache */
" movl %%cr0, %%eax \n"
" orl $(0x1<<30),%%eax \n"
" movl %%eax, %%cr0 \n"
/* The MTRR setup below causes the machine to reset. Must investigate. */
/* disable fixed mtrr from now on, it will be enabled by coreboot_ram again*/
" movl %[_SYSCFG_MSR], %%ecx \n"
" rdmsr \n"
" andl %[_SYSCFG_MSR_newval], %%eax\n"
// " andl $(~(SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn)), %%eax\n"
/* clear sth */
" xorl %%eax, %%eax \n"
" xorl %%edx, %%edx \n"
" movl $0x201, %%ecx \n"
" wrmsr \n"
" movl $0x200, %%ecx \n"
" wrmsr \n"
#warning Must clear MTRR 0x200 and 0x201
/* Set the default memory type and disable fixed and enable variable MTRRs */
" movl %[_MTRRdefType_MSR], %%ecx \n"
@ -84,16 +82,11 @@ void disable_car(void)
" movl %%cr0, %%eax \n"
" andl $0x9fffffff,%%eax \n"
" movl %%eax, %%cr0 \n"
#endif
" wbinvd \n"
" call stage1_phase3 \n"
:: [newesp] "i" (newlocation),
[_SYSCFG_MSR] "i" (SYSCFG_MSR),
[_SYSCFG_MSR_newval] "i" (~(SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn)),
[_SYSCFG_MSR_MtrrFixDramModEn] "i" (SYSCFG_MSR_MtrrFixDramModEn),
[_SYSCFG_MSR_MtrrFixDramEn] "i" (SYSCFG_MSR_MtrrFixDramEn),
[_MTRRdefType_MSR] "i" (MTRRdefType_MSR)
: "memory");
}