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arch/x86/pci_ops_conf1.c is already linked into stage1 and SHARED.

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Don't link it into initram as well.

With this change, I can compile stage0, stage1, initram and large parts
of stage2 without problems for the M57SLI target.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@770 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-08-15 19:56:41 +00:00
parent 1b3d2c1a0b
commit e855c968c1
1 changed files with 0 additions and 1 deletions
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mainboard/gigabyte/m57sli/Makefile
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@ -28,7 +28,6 @@ STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o \
INITRAM_SRC= $(src)/mainboard/$(MAINBOARDDIR)/initram.c \
$(src)/northbridge/amd/k8/raminit.c \
$(src)/arch/x86/pci_ops_conf1.c \
$(src)/southbridge/nvidia/mcp55/stage1_smbus.c \
$(src)/lib/clog2.c