From e855c968c1d581d6ced5c79962a5a0b80e34bd36 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Fri, 15 Aug 2008 19:56:41 +0000 Subject: [PATCH] arch/x86/pci_ops_conf1.c is already linked into stage1 and SHARED. Don't link it into initram as well. With this change, I can compile stage0, stage1, initram and large parts of stage2 without problems for the M57SLI target. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Carl-Daniel Hailfinger git-svn-id: svn://coreboot.org/repository/coreboot-v3@770 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- mainboard/gigabyte/m57sli/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/mainboard/gigabyte/m57sli/Makefile b/mainboard/gigabyte/m57sli/Makefile index 3decb954eb..afe8120be4 100644 --- a/mainboard/gigabyte/m57sli/Makefile +++ b/mainboard/gigabyte/m57sli/Makefile @@ -28,7 +28,6 @@ STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o \ INITRAM_SRC= $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/k8/raminit.c \ - $(src)/arch/x86/pci_ops_conf1.c \ $(src)/southbridge/nvidia/mcp55/stage1_smbus.c \ $(src)/lib/clog2.c