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UPSTREAM: include/device/dram/ddr3: Add additional frequencies

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IvyBridge memory controller supports more frequencies than SandyBridge.
Required for future patches.

Change-Id: I0bcb670c20407ec0aec20bae85c4cbe6ccc44b16
Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-on: https://review.coreboot.org/15182
Original-Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Original-Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com>
(cherry-picked from commit 577aad6f13)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354196
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Patrick Rudolph 2016-06-14 18:48:17 +02:00 • committed by chrome-bot
parent 8fc1e4b098
commit e5d40a545d
1 changed files with 4 additions and 0 deletions
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4
src/include/device/dram/ddr3.h
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@ -35,9 +35,13 @@
*/
#define TCK_1333MHZ 192
#define TCK_1200MHZ 212
#define TCK_1100MHZ 232
#define TCK_1066MHZ 240
#define TCK_1000MHZ 256
#define TCK_933MHZ 274
#define TCK_900MHZ 284
#define TCK_800MHZ 320
#define TCK_700MHZ 365
#define TCK_666MHZ 384
#define TCK_533MHZ 480
#define TCK_400MHZ 640