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Fix the sb600 and rs690 code in the same way we just fixed the amd8111.

Browse source 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@911 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-10-09 15:11:52 +00:00
parent bf6d16032e
commit e3517187a0
12 changed files with 11 additions and 36 deletions
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1
southbridge/amd/rs690/gfx.c
View file

@ -571,6 +571,7 @@ struct device_operations rs690_gfx = {
.constructor = default_device_constructor,
.phase2_setup_scan_bus = rs690_internal_gfx_enable,
.phase3_scan = 0,
.phase4_enable_disable = rs690_enable,
.phase4_read_resources = rs690_gfx_read_resources,
.phase4_set_resources = rs690_gfx_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,

1
southbridge/amd/rs690/ht.c
View file

@ -87,6 +87,7 @@ struct device_operations rs690_ht = {
.constructor = default_device_constructor,
.phase2_setup_scan_bus = rs690_enable,
.phase3_scan = 0,
.phase4_enable_disable = rs690_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,

1
southbridge/amd/rs690/pcie.c
View file

@ -399,6 +399,7 @@ struct device_operations rs690_pcie = {
.device = PCI_DEVICE_ID_ATI_RS690_PCIE}}},
.constructor = default_device_constructor,
.phase3_scan = pci_scan_bridge,
.phase4_enable_disable = rs690_enable,
.phase4_read_resources = pci_bus_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_bus_enable_resources,

2
southbridge/amd/sb600/ac97.c
View file

@ -38,6 +38,7 @@ struct device_operations ac97audio = {
.device = PCI_DEVICE_ID_ATI_SB600_ACI}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
@ -51,6 +52,7 @@ struct device_operations ac97modem = {
.device = PCI_DEVICE_ID_ATI_SB600_MCI}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,

1
southbridge/amd/sb600/hda.c
View file

@ -279,6 +279,7 @@ struct device_operations sb600_hda = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_SB600_HDA}}},
.constructor = default_device_constructor,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,

1
southbridge/amd/sb600/ide.c
View file

@ -70,6 +70,7 @@ struct device_operations sb600_ide = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_SB600_IDE}}},
.constructor = default_device_constructor,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,

1
southbridge/amd/sb600/lpc.c
View file

@ -213,6 +213,7 @@ struct device_operations sb600_lpc = {
.device = PCI_DEVICE_ID_ATI_SB600_LPC}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = sb600_lpc_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = sb600_lpc_enable_resources,

1
southbridge/amd/sb600/sata.c
View file

@ -193,6 +193,7 @@ struct device_operations sb600_sata = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_SB600_SATA}}},
.constructor = default_device_constructor,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,

13
southbridge/amd/sb600/sb600.c
View file

@ -201,16 +201,3 @@ void sb600_enable(struct device * dev)
deviceid);
}
}
struct device_operations sb600 = {
.id = {.type = DEVICE_ID_PCI,
{.pci = {.vendor = PCI_VENDOR_ID_AMD,
.device = PCI_DEVICE_ID_ATI_SB600_LPC}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase6_init = NULL,
.ops_pci = &pci_dev_ops_pci,
};

23
southbridge/amd/sb600/sb600.dts
View file

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Ronald G. Minnich <rminnich@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
{
device_operations = "sb600";
};

1
southbridge/amd/sb600/sm.c
View file

@ -395,6 +395,7 @@ struct device_operations sb600_sm = {
.device = PCI_DEVICE_ID_ATI_SB600_SM}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = sb600_sm_read_resources,
.phase4_set_resources = sb600_sm_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,

1
southbridge/amd/sb600/usb.c
View file

@ -205,6 +205,7 @@ struct device_operations sb600_usb2 = {
.device = PCI_DEVICE_ID_ATI_SB600_USB2}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
.phase4_enable_disable = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = usb_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,