UPSTREAM: MAINTAINERS/RISCV: Cover mb/emulation/spike-riscv

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16988
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: Id5f3f7f25041189d137ef4daa9f63a3b478763bc
Reviewed-on: https://chromium-review.googlesource.com/400108
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Jonathan Neuschäfer 2016-10-12 00:18:00 +02:00 committed by chrome-bot
parent 7df5dbc624
commit b7f75cf6c9

View file

@ -124,7 +124,7 @@ M: Ronald Minnich <rminnich@gmail.com>
S: Maintained
F: src/arch/riscv/
F: src/soc/ucb/
F: src/mainboard/emulation/qemu-riscv/
F: src/mainboard/emulation/*-riscv/
POWER8 ARCHITECTURE
M: Ronald Minnich <rminnich@gmail.com>