From b7f75cf6c9b708f078757705511e3a748c632f4f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Wed, 12 Oct 2016 00:18:00 +0200 Subject: [PATCH] UPSTREAM: MAINTAINERS/RISCV: Cover mb/emulation/spike-riscv BUG=None BRANCH=None TEST=None Signed-off-by: Jonathan Neuschfer Reviewed-on: https://review.coreboot.org/16988 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Change-Id: Id5f3f7f25041189d137ef4daa9f63a3b478763bc Reviewed-on: https://chromium-review.googlesource.com/400108 Commit-Ready: Furquan Shaikh Tested-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 750fcff607..16cdc4be77 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -124,7 +124,7 @@ M: Ronald Minnich S: Maintained F: src/arch/riscv/ F: src/soc/ucb/ -F: src/mainboard/emulation/qemu-riscv/ +F: src/mainboard/emulation/*-riscv/ POWER8 ARCHITECTURE M: Ronald Minnich