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UPSTREAM: nb/i945/gma.c: Remove writes to FIFO Watermark registers

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Those are the result from tracing what linux or the option rom do
but are not needed here.

TESTED on Thinkpad X60.

BUG=none
BRANCH=none
TEST=none

Change-Id: I4aa3ebf50bc772ff0baf0b6c685022ea40750234
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Id: d81078d944
Original-Change-Id: I4297a78c4ab6a19ef6161778c993fc3f3fb08c7e
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/18294
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/443675
This commit is contained in:
Arthur Heymans 2017-02-06 15:08:04 +01:00 • committed by chrome-bot
parent 30cdd627ce
commit b58d1197a4
1 changed files with 0 additions and 8 deletions
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8
src/northbridge/intel/i945/gma.c
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@ -293,14 +293,6 @@ static int intel_gma_init_lvds(struct northbridge_intel_i945_config *conf,
write32(mmiobase + DSPPOS(0), 0);
/* Backlight init. */
write32(mmiobase + FW_BLC_SELF, FW_BLC_SELF_EN_MASK);
write32(mmiobase + FW_BLC, 0x011d011a);
write32(mmiobase + FW_BLC2, 0x00000102);
write32(mmiobase + FW_BLC_SELF, FW_BLC_SELF_EN_MASK);
write32(mmiobase + FW_BLC_SELF, 0x0001003f);
write32(mmiobase + FW_BLC, 0x011d0109);
write32(mmiobase + FW_BLC2, 0x00000102);
write32(mmiobase + FW_BLC_SELF, FW_BLC_SELF_EN_MASK);
write32(mmiobase + BLC_PWM_CTL, conf->gpu_backlight);
edid.bytes_per_line = (edid.bytes_per_line + 63) & ~63;