mirror of
https://github.com/fail0verflow/switch-coreboot.git
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gru: implement hw reset function
Asserting this GPIO will send a signal to the EC to trigger a reset
for the AP and the CR50.
BRANCH=none
BUG=chrome-os-partner:55252
TEST=the device now reboots when it needs to switch between different
boot modes instead of hanging with "failed to reboot" message.
Change-Id: I8d168e313b6983c96c80f7ad6d70bb84c1ec1d9c
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 83a4c8ff68
Original-Change-Id: Idfd20977cf3682bd8933f89e8eec53005e55864e
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/360238
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15718
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
parent
e19d9af9ee
commit
b4d3d09ded
3 changed files with 8 additions and 3 deletions
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@ -16,7 +16,6 @@
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bootblock-y += bootblock.c
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bootblock-y += bootblock.c
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bootblock-y += chromeos.c
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bootblock-y += chromeos.c
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bootblock-y += memlayout.ld
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bootblock-y += memlayout.ld
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bootblock-y += reset.c
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verstage-y += chromeos.c
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verstage-y += chromeos.c
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verstage-y += memlayout.ld
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verstage-y += memlayout.ld
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@ -25,7 +24,6 @@ verstage-y += reset.c
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romstage-y += boardid.c
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romstage-y += boardid.c
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romstage-y += chromeos.c
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romstage-y += chromeos.c
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romstage-y += memlayout.ld
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romstage-y += memlayout.ld
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romstage-y += reset.c
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romstage-y += sdram_configs.c
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romstage-y += sdram_configs.c
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ramstage-y += boardid.c
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ramstage-y += boardid.c
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@ -13,9 +13,14 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <arch/io.h>
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#include <gpio.h>
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#include <reset.h>
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#include <reset.h>
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#include "board.h"
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void hard_reset(void)
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void hard_reset(void)
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{
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{
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gpio_output(GPIO_RESET, 1);
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while (1)
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;
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}
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}
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@ -29,6 +29,8 @@ bootblock-y += mmu_operations.c
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bootblock-y += timer.c
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bootblock-y += timer.c
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verstage-y += ../common/cbmem.c
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verstage-y += ../common/cbmem.c
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verstage-y += ../common/gpio.c
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verstage-y += gpio.c
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verstage-y += sdram.c
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verstage-y += sdram.c
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verstage-y += ../common/spi.c
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verstage-y += ../common/spi.c
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verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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