gru: implement hw reset function

Asserting this GPIO will send a signal to the EC to trigger a reset
for the AP and the CR50.

BRANCH=none
BUG=chrome-os-partner:55252
TEST=the device now reboots when it needs to switch between different
     boot modes instead of hanging with "failed to reboot" message.

Change-Id: Idfd20977cf3682bd8933f89e8eec53005e55864e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/360238
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

src/mainboard/google/gru/Makefile.inc

@@ -16,7 +16,6 @@
 bootblock-y += bootblock.c
 bootblock-y += chromeos.c
 bootblock-y += memlayout.ld
-bootblock-y += reset.c
 
 verstage-y += chromeos.c
 verstage-y += memlayout.ld
@@ -25,7 +24,6 @@ verstage-y += reset.c
 romstage-y += boardid.c
 romstage-y += chromeos.c
 romstage-y += memlayout.ld
-romstage-y += reset.c
 romstage-y += sdram_configs.c
 
 ramstage-y += boardid.c

src/mainboard/google/gru/reset.c

@@ -13,9 +13,14 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
+#include <gpio.h>
 #include <reset.h>
 
+#include "board.h"
+
 void hard_reset(void)
 {
+	gpio_output(GPIO_RESET, 1);
+	while (1)
+		;
 }

src/soc/rockchip/rk3399/Makefile.inc

@@ -29,6 +29,8 @@ bootblock-y += mmu_operations.c
 bootblock-y += timer.c
 
 verstage-y += ../common/cbmem.c
+verstage-y += ../common/gpio.c
+verstage-y += gpio.c
 verstage-y += sdram.c
 verstage-y += ../common/spi.c
 verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c