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UPSTREAM: soc/intel/skylake: Add SATA interrupt for APIC mode

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Add SATA interrupt for APIC mode

BUG=none
BRANCH=none
TEST=none

Change-Id: Ied09c5580cb3ce3ac4673c4191e58462ff585c41
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 951ec96f17
Original-Change-Id: I9e0682e235715399da2c585174925c89b9116ab3
Original-Signed-off-by: Sooi, Li Cheng <li.cheng.sooi@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18130
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/430734
This commit is contained in:
Sooi, Li Cheng 2017-01-04 17:22:51 +08:00 • committed by chrome-bot
parent 507b577b15
commit a80f8d7238
1 changed files with 2 additions and 0 deletions
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2
src/soc/intel/skylake/acpi/pci_irqs.asl
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@ -48,6 +48,8 @@ Name (PICP, Package () {
Package () { 0x0016FFFF, 1, 0, HECI_2_IRQ },
Package () { 0x0016FFFF, 2, 0, IDER_IRQ },
Package () { 0x0016FFFF, 3, 0, KT_IRQ },
/* D23: Sata controller */
Package () { 0x0017FFFF, 0, 0, SATA_IRQ },
/* D21: SerialIo */
Package () { 0x0015FFFF, 0, 0, LPSS_I2C0_IRQ },
Package () { 0x0015FFFF, 1, 0, LPSS_I2C1_IRQ },