mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
This part was missing in the last commit. Sorry.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@261 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Stefan Reinauer
parent
0528863e20
commit
a28ba99d1a
10 changed files with 476 additions and 0 deletions
23
superio/Kconfig
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23
superio/Kconfig
Normal file
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@ -0,0 +1,23 @@
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##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 coresystems GmbH
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## Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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source superio/winbond/Kconfig
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23
superio/Makefile
Normal file
23
superio/Makefile
Normal file
|
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@ -0,0 +1,23 @@
|
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##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 coresystems GmbH
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## Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH.
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##
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||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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include $(src)/superio/winbond/Makefile
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27
superio/winbond/Kconfig
Normal file
27
superio/winbond/Kconfig
Normal file
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@ -0,0 +1,27 @@
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##
|
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 coresystems GmbH
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## Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH.
|
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##
|
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## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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config SUPERIO_WINBOND_W83627HF
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boolean
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help
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This option is internally used to decide which southbridge code to
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use. It is set in the mainboard Kconfig
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25
superio/winbond/Makefile
Normal file
25
superio/winbond/Makefile
Normal file
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@ -0,0 +1,25 @@
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##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 coresystems GmbH
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## Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH.
|
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##
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## This program is free software; you can redistribute it and/or modify
|
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## it under the terms of the GNU General Public License as published by
|
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## the Free Software Foundation; either version 2 of the License, or
|
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## (at your option) any later version.
|
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##
|
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## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ifdef CONFIG_SUPERIO_WINBOND_W83627HF
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include $(src)/superio/winbond/w83627hf/Makefile
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endif
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30
superio/winbond/w83627hf/Makefile
Normal file
30
superio/winbond/w83627hf/Makefile
Normal file
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@ -0,0 +1,30 @@
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##
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||||
## This file is part of the LinuxBIOS project.
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##
|
||||
## Copyright (C) 2007 coresystems GmbH
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## Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH.
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##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
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## (at your option) any later version.
|
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##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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# always add to variables, as there could be more than one superio
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STAGE2_CHIPSET_OBJ += $(obj)/superio/winbond/w83627hf/superio.o
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$(obj)/superio/winbond/w83627hf/%.o: $(src)/superio/winbond/w83627hf/%.c
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$(Q)mkdir -p $(obj)/superio/winbond/w83627hf/
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$(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n"
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$(Q)$(CC) $(INITCFLAGS) -c $< -o $@
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9
superio/winbond/w83627hf/chip.h
Normal file
9
superio/winbond/w83627hf/chip.h
Normal file
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@ -0,0 +1,9 @@
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#include <keyboard.h>
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#include <uart8250.h>
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struct superio_winbond_w83627hf_config {
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int com1_baud, com2_baud;
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struct pc_keyboard keyboard;
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};
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210
superio/winbond/w83627hf/superio.c
Normal file
210
superio/winbond/w83627hf/superio.c
Normal file
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@ -0,0 +1,210 @@
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/* Copyright 2000 AG Electronics Ltd.
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* Copyright 2003-2004 Linux Networx
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* Copyright 2004 Tyan
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* By LYH change from PC87360
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* Copyright 2007 coresystems GmbH
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* This code is distributed without warranty under the GPL v2 (see COPYING)
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*/
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <console/console.h>
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#include <string.h>
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//#include <bitops.h>
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#include <uart8250.h>
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#include <keyboard.h>
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// #include <pc80/mc146818rtc.h>
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#include "chip.h"
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#include "w83627hf.h"
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static void pnp_enter_ext_func_mode(struct device * dev)
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{
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outb(0x87, dev->path.u.pnp.port);
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outb(0x87, dev->path.u.pnp.port);
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}
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static void pnp_exit_ext_func_mode(struct device * dev)
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{
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outb(0xaa, dev->path.u.pnp.port);
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}
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static void pnp_write_index(unsigned long port_base, u8 reg, u8 value)
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{
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outb(reg, port_base);
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outb(value, port_base + 1);
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}
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static u8 pnp_read_index(unsigned long port_base, u8 reg)
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{
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outb(reg, port_base);
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return inb(port_base + 1);
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}
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static void enable_hwm_smbus(struct device * dev) {
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/* set the pin 91,92 as I2C bus */
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u8 reg, value;
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reg = 0x2b;
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value = pnp_read_config(dev, reg);
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value &= 0x3f;
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pnp_write_config(dev, reg, value);
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}
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static void init_acpi(struct device * dev)
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{
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u8 value = 0x20;
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int power_on = 1;
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#warning Fix CMOS handling
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// get_option(&power_on, "power_on_after_fail");
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pnp_enter_ext_func_mode(dev);
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pnp_write_index(dev->path.u.pnp.port,7,0x0a);
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value = pnp_read_config(dev, 0xE4);
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value &= ~(3<<5);
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if(power_on) {
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value |= (1<<5);
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}
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pnp_write_config(dev, 0xE4, value);
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pnp_exit_ext_func_mode(dev);
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}
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static void init_hwm(unsigned long base)
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{
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u8 reg, value;
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int i;
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unsigned hwm_reg_values[] = {
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/* reg mask data */
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0x40, 0xff, 0x81, /* start HWM */
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0x48, 0xaa, 0x2a, /* set SMBus base to 0x54>>1 */
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0x4a, 0x21, 0x21, /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */
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0x4e, 0x80, 0x00,
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0x43, 0x00, 0xff,
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0x44, 0x00, 0x3f,
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0x4c, 0xbf, 0x18,
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0x4d, 0xff, 0x80 /* turn off beep */
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};
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for(i = 0; i< sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i+=3 ) {
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reg = hwm_reg_values[i];
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value = pnp_read_index(base, reg);
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value &= 0xff & hwm_reg_values[i+1];
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value |= 0xff & hwm_reg_values[i+2];
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#if 0
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printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value);
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#endif
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pnp_write_index(base, reg, value);
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}
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}
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static void w83627hf_init(struct device * dev)
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{
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struct superio_winbond_w83627hf_config *conf;
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struct resource *res0, *res1;
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#if 1
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printk(BIOS_ERR, "dummy init XXXX\n");
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init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
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#endif
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if (!dev->enabled) {
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return;
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}
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conf = dev->device_configuration;
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switch(dev->path.u.pnp.device) {
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case W83627HF_SP1:
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res0 = find_resource(dev, PNP_IDX_IO0);
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#warning init_uart8250
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//init_uart8250(res0->base, &conf->com1);
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break;
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case W83627HF_SP2:
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res0 = find_resource(dev, PNP_IDX_IO0);
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#warning init_uart8250
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//init_uart8250(res0->base, &conf->com2);
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break;
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case W83627HF_KBC:
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res0 = find_resource(dev, PNP_IDX_IO0);
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res1 = find_resource(dev, PNP_IDX_IO1);
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init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
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break;
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case W83627HF_HWM:
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res0 = find_resource(dev, PNP_IDX_IO0);
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#define HWM_INDEX_PORT 5
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init_hwm(res0->base + HWM_INDEX_PORT);
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break;
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case W83627HF_ACPI:
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init_acpi(dev);
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break;
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}
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}
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void w83627hf_pnp_set_resources(struct device * dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_resources(dev);
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pnp_exit_ext_func_mode(dev);
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}
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void w83627hf_pnp_enable_resources(struct device * dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_enable_resources(dev);
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switch(dev->path.u.pnp.device) {
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case W83627HF_HWM:
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printk(BIOS_DEBUG, "w83627hf hwm smbus enabled\n");
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enable_hwm_smbus(dev);
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break;
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}
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pnp_exit_ext_func_mode(dev);
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}
|
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|
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void w83627hf_pnp_enable(struct device * dev)
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{
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|
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if (!dev->enabled) {
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pnp_enter_ext_func_mode(dev);
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|
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pnp_set_logical_device(dev);
|
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pnp_set_enable(dev, 0);
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|
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pnp_exit_ext_func_mode(dev);
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}
|
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}
|
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|
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static struct device_operations ops = {
|
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.phase4_read_resources = pnp_read_resources,
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.phase4_set_resources = w83627hf_pnp_set_resources,
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.phase4_enable_disable = w83627hf_pnp_enable_resources,
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.phase5_enable_resources = w83627hf_pnp_enable,
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.phase6_init = w83627hf_init,
|
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};
|
||||
|
||||
static struct pnp_info pnp_dev_info[] = {
|
||||
{ &ops, W83627HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
|
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{ &ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
|
||||
{ &ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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{ &ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
|
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// No 4 { 0,},
|
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{ &ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
|
||||
{ &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
|
||||
{ &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
|
||||
{ &ops, W83627HF_GPIO2, },
|
||||
{ &ops, W83627HF_GPIO3, },
|
||||
{ &ops, W83627HF_ACPI, },
|
||||
{ &ops, W83627HF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
|
||||
};
|
||||
|
||||
static void enable_dev(struct device *dev)
|
||||
{
|
||||
pnp_enable_devices(dev, &ops,
|
||||
sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
|
||||
}
|
||||
/*
|
||||
struct chip_operations superio_winbond_w83627hf_ops = {
|
||||
CHIP_NAME("Winbond W83627HF Super I/O")
|
||||
.enable_dev = enable_dev,
|
||||
};
|
||||
*/
|
||||
91
superio/winbond/w83627hf/w83627hf.h
Normal file
91
superio/winbond/w83627hf/w83627hf.h
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
#define W83627HF_FDC 0 /* Floppy */
|
||||
#define W83627HF_PP 1 /* Parallel Port */
|
||||
#define W83627HF_SP1 2 /* Com1 */
|
||||
#define W83627HF_SP2 3 /* Com2 */
|
||||
#define W83627HF_KBC 5 /* Keyboard & Mouse */
|
||||
#define W83627HF_CIR 6
|
||||
#define W83627HF_GAME_MIDI_GPIO1 7
|
||||
#define W83627HF_GPIO2 8
|
||||
#define W83627HF_GPIO3 9
|
||||
#define W83627HF_ACPI 10
|
||||
#define W83627HF_HWM 11 /* Hardware Monitor */
|
||||
|
||||
//#define W83627HF_GPIO_DEV PNP_DEV(0x2e, W83627HF_GPIO)
|
||||
//#define W83627HF_XBUS_DEV PNP_DEV(0x2e, W83627HF_XBUS)
|
||||
|
||||
#define W83627HF_GPSEL 0xf0
|
||||
#define W83627HF_GPCFG1 0xf1
|
||||
#define W83627HF_GPEVR 0xf2
|
||||
#define W83627HF_GPCFG2 0xf3
|
||||
#define W83627HF_EXTCFG 0xf4
|
||||
#define W83627HF_IOEXT1A 0xf5
|
||||
#define W83627HF_IOEXT1B 0xf6
|
||||
#define W83627HF_IOEXT2A 0xf7
|
||||
#define W83627HF_IOEXT2B 0xf8
|
||||
|
||||
#define W83627HF_GPDO_0 0x00
|
||||
#define W83627HF_GPDI_0 0x01
|
||||
#define W83627HF_GPDO_1 0x02
|
||||
#define W83627HF_GPDI_1 0x03
|
||||
#define W83627HF_GPEVEN_1 0x04
|
||||
#define W83627HF_GPEVST_1 0x05
|
||||
#define W83627HF_GPDO_2 0x06
|
||||
#define W83627HF_GPDI_2 0x07
|
||||
#define W83627HF_GPDO_3 0x08
|
||||
#define W83627HF_GPDI_3 0x09
|
||||
#define W83627HF_GPDO_4 0x0a
|
||||
#define W83627HF_GPDI_4 0x0b
|
||||
#define W83627HF_GPEVEN_4 0x0c
|
||||
#define W83627HF_GPEVST_4 0x0d
|
||||
#define W83627HF_GPDO_5 0x0e
|
||||
#define W83627HF_GPDI_5 0x0f
|
||||
#define W83627HF_GPDO_6 0x10
|
||||
#define W83627HF_GPDO_7A 0x11
|
||||
#define W83627HF_GPDO_7B 0x12
|
||||
#define W83627HF_GPDO_7C 0x13
|
||||
#define W83627HF_GPDO_7D 0x14
|
||||
#define W83627HF_GPDI_7A 0x15
|
||||
#define W83627HF_GPDI_7B 0x16
|
||||
#define W83627HF_GPDI_7C 0x17
|
||||
#define W83627HF_GPDI_7D 0x18
|
||||
|
||||
#define W83627HF_XIOCNF 0xf0
|
||||
#define W83627HF_XIOBA1H 0xf1
|
||||
#define W83627HF_XIOBA1L 0xf2
|
||||
#define W83627HF_XIOSIZE1 0xf3
|
||||
#define W83627HF_XIOBA2H 0xf4
|
||||
#define W83627HF_XIOBA2L 0xf5
|
||||
#define W83627HF_XIOSIZE2 0xf6
|
||||
#define W83627HF_XMEMCNF1 0xf7
|
||||
#define W83627HF_XMEMCNF2 0xf8
|
||||
#define W83627HF_XMEMBAH 0xf9
|
||||
#define W83627HF_XMEMBAL 0xfa
|
||||
#define W83627HF_XMEMSIZE 0xfb
|
||||
#define W83627HF_XIRQMAP1 0xfc
|
||||
#define W83627HF_XIRQMAP2 0xfd
|
||||
#define W83627HF_XBIMM 0xfe
|
||||
#define W83627HF_XBBSL 0xff
|
||||
|
||||
#define W83627HF_XBCNF 0x00
|
||||
#define W83627HF_XZCNF0 0x01
|
||||
#define W83627HF_XZCNF1 0x02
|
||||
#define W83627HF_XIRQC0 0x04
|
||||
#define W83627HF_XIRQC1 0x05
|
||||
#define W83627HF_XIRQC2 0x06
|
||||
#define W83627HF_XIMA0 0x08
|
||||
#define W83627HF_XIMA1 0x09
|
||||
#define W83627HF_XIMA2 0x0a
|
||||
#define W83627HF_XIMA3 0x0b
|
||||
#define W83627HF_XIMD 0x0c
|
||||
#define W83627HF_XZCNF2 0x0d
|
||||
#define W83627HF_XZCNF3 0x0e
|
||||
#define W83627HF_XZM0 0x0f
|
||||
#define W83627HF_XZM1 0x10
|
||||
#define W83627HF_XZM2 0x11
|
||||
#define W83627HF_XZM3 0x12
|
||||
#define W83627HF_HAP0 0x13
|
||||
#define W83627HF_HAP1 0x14
|
||||
#define W83627HF_XSCNF 0x15
|
||||
#define W83627HF_XWBCNF 0x16
|
||||
|
||||
|
||||
15
superio/winbond/w83627hf/w83627hf_early_init.c
Normal file
15
superio/winbond/w83627hf/w83627hf_early_init.c
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
#include <arch/romcc_io.h>
|
||||
#include "w83627hf.h"
|
||||
|
||||
static void w83627hf_disable_dev(device_t dev)
|
||||
{
|
||||
pnp_set_logical_device(dev);
|
||||
pnp_set_enable(dev, 0);
|
||||
}
|
||||
static void w83627hf_enable_dev(device_t dev, unsigned iobase)
|
||||
{
|
||||
pnp_set_logical_device(dev);
|
||||
pnp_set_enable(dev, 0);
|
||||
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
|
||||
pnp_set_enable(dev, 1);
|
||||
}
|
||||
23
superio/winbond/w83627hf/w83627hf_early_serial.c
Normal file
23
superio/winbond/w83627hf/w83627hf_early_serial.c
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
#include <arch/romcc_io.h>
|
||||
#include "w83627hf.h"
|
||||
|
||||
static inline void pnp_enter_ext_func_mode(device_t dev)
|
||||
{
|
||||
unsigned port = dev>>8;
|
||||
outb(0x87, port);
|
||||
outb(0x87, port);
|
||||
}
|
||||
static void pnp_exit_ext_func_mode(device_t dev)
|
||||
{
|
||||
unsigned port = dev>>8;
|
||||
outb(0xaa, port);
|
||||
}
|
||||
static void w83627hf_enable_serial(device_t dev, unsigned iobase)
|
||||
{
|
||||
pnp_enter_ext_func_mode(dev);
|
||||
pnp_set_logical_device(dev);
|
||||
pnp_set_enable(dev, 0);
|
||||
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
|
||||
pnp_set_enable(dev, 1);
|
||||
pnp_exit_ext_func_mode(dev);
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue