diff --git a/superio/Kconfig b/superio/Kconfig new file mode 100644 index 0000000000..54028d5fd3 --- /dev/null +++ b/superio/Kconfig @@ -0,0 +1,23 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 coresystems GmbH +## Written by Stefan Reinauer for coresystems GmbH. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +source superio/winbond/Kconfig + diff --git a/superio/Makefile b/superio/Makefile new file mode 100644 index 0000000000..31cfd2eb7f --- /dev/null +++ b/superio/Makefile @@ -0,0 +1,23 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 coresystems GmbH +## Written by Stefan Reinauer for coresystems GmbH. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +include $(src)/superio/winbond/Makefile + diff --git a/superio/winbond/Kconfig b/superio/winbond/Kconfig new file mode 100644 index 0000000000..b0a2ff5dbe --- /dev/null +++ b/superio/winbond/Kconfig @@ -0,0 +1,27 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 coresystems GmbH +## Written by Stefan Reinauer for coresystems GmbH. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config SUPERIO_WINBOND_W83627HF + boolean + help + This option is internally used to decide which southbridge code to + use. It is set in the mainboard Kconfig + diff --git a/superio/winbond/Makefile b/superio/winbond/Makefile new file mode 100644 index 0000000000..9ae72bd809 --- /dev/null +++ b/superio/winbond/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 coresystems GmbH +## Written by Stefan Reinauer for coresystems GmbH. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ifdef CONFIG_SUPERIO_WINBOND_W83627HF + include $(src)/superio/winbond/w83627hf/Makefile +endif + diff --git a/superio/winbond/w83627hf/Makefile b/superio/winbond/w83627hf/Makefile new file mode 100644 index 0000000000..00b511e5f3 --- /dev/null +++ b/superio/winbond/w83627hf/Makefile @@ -0,0 +1,30 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 coresystems GmbH +## Written by Stefan Reinauer for coresystems GmbH. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# always add to variables, as there could be more than one superio + +STAGE2_CHIPSET_OBJ += $(obj)/superio/winbond/w83627hf/superio.o + +$(obj)/superio/winbond/w83627hf/%.o: $(src)/superio/winbond/w83627hf/%.c + $(Q)mkdir -p $(obj)/superio/winbond/w83627hf/ + $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(INITCFLAGS) -c $< -o $@ + diff --git a/superio/winbond/w83627hf/chip.h b/superio/winbond/w83627hf/chip.h new file mode 100644 index 0000000000..af08bda695 --- /dev/null +++ b/superio/winbond/w83627hf/chip.h @@ -0,0 +1,9 @@ + + +#include +#include + +struct superio_winbond_w83627hf_config { + int com1_baud, com2_baud; + struct pc_keyboard keyboard; +}; diff --git a/superio/winbond/w83627hf/superio.c b/superio/winbond/w83627hf/superio.c new file mode 100644 index 0000000000..fe47830c69 --- /dev/null +++ b/superio/winbond/w83627hf/superio.c @@ -0,0 +1,210 @@ +/* Copyright 2000 AG Electronics Ltd. + * Copyright 2003-2004 Linux Networx + * Copyright 2004 Tyan + * By LYH change from PC87360 + * Copyright 2007 coresystems GmbH + * This code is distributed without warranty under the GPL v2 (see COPYING) + */ + +#include +#include +#include +#include +#include +//#include +#include +#include +// #include +#include "chip.h" +#include "w83627hf.h" + + +static void pnp_enter_ext_func_mode(struct device * dev) +{ + outb(0x87, dev->path.u.pnp.port); + outb(0x87, dev->path.u.pnp.port); +} +static void pnp_exit_ext_func_mode(struct device * dev) +{ + outb(0xaa, dev->path.u.pnp.port); +} + +static void pnp_write_index(unsigned long port_base, u8 reg, u8 value) +{ + outb(reg, port_base); + outb(value, port_base + 1); +} + +static u8 pnp_read_index(unsigned long port_base, u8 reg) +{ + outb(reg, port_base); + return inb(port_base + 1); +} + +static void enable_hwm_smbus(struct device * dev) { + /* set the pin 91,92 as I2C bus */ + u8 reg, value; + reg = 0x2b; + value = pnp_read_config(dev, reg); + value &= 0x3f; + pnp_write_config(dev, reg, value); +} + +static void init_acpi(struct device * dev) +{ + u8 value = 0x20; + int power_on = 1; +#warning Fix CMOS handling + // get_option(&power_on, "power_on_after_fail"); + pnp_enter_ext_func_mode(dev); + pnp_write_index(dev->path.u.pnp.port,7,0x0a); + value = pnp_read_config(dev, 0xE4); + value &= ~(3<<5); + if(power_on) { + value |= (1<<5); + } + pnp_write_config(dev, 0xE4, value); + pnp_exit_ext_func_mode(dev); +} + +static void init_hwm(unsigned long base) +{ + u8 reg, value; + int i; + + unsigned hwm_reg_values[] = { +/* reg mask data */ + 0x40, 0xff, 0x81, /* start HWM */ + 0x48, 0xaa, 0x2a, /* set SMBus base to 0x54>>1 */ + 0x4a, 0x21, 0x21, /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */ + 0x4e, 0x80, 0x00, + 0x43, 0x00, 0xff, + 0x44, 0x00, 0x3f, + 0x4c, 0xbf, 0x18, + 0x4d, 0xff, 0x80 /* turn off beep */ + + }; + + for(i = 0; i< sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i+=3 ) { + reg = hwm_reg_values[i]; + value = pnp_read_index(base, reg); + value &= 0xff & hwm_reg_values[i+1]; + value |= 0xff & hwm_reg_values[i+2]; +#if 0 + printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value); +#endif + pnp_write_index(base, reg, value); + } +} + +static void w83627hf_init(struct device * dev) +{ + struct superio_winbond_w83627hf_config *conf; + struct resource *res0, *res1; + +#if 1 + printk(BIOS_ERR, "dummy init XXXX\n"); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); +#endif + + if (!dev->enabled) { + return; + } + + conf = dev->device_configuration; + switch(dev->path.u.pnp.device) { + case W83627HF_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); +#warning init_uart8250 + //init_uart8250(res0->base, &conf->com1); + break; + case W83627HF_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); +#warning init_uart8250 + //init_uart8250(res0->base, &conf->com2); + break; + case W83627HF_KBC: + res0 = find_resource(dev, PNP_IDX_IO0); + res1 = find_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + case W83627HF_HWM: + res0 = find_resource(dev, PNP_IDX_IO0); +#define HWM_INDEX_PORT 5 + init_hwm(res0->base + HWM_INDEX_PORT); + break; + case W83627HF_ACPI: + init_acpi(dev); + break; + } +} + +void w83627hf_pnp_set_resources(struct device * dev) +{ + pnp_enter_ext_func_mode(dev); + pnp_set_resources(dev); + pnp_exit_ext_func_mode(dev); + +} + +void w83627hf_pnp_enable_resources(struct device * dev) +{ + pnp_enter_ext_func_mode(dev); + pnp_enable_resources(dev); + switch(dev->path.u.pnp.device) { + case W83627HF_HWM: + printk(BIOS_DEBUG, "w83627hf hwm smbus enabled\n"); + enable_hwm_smbus(dev); + break; + } + pnp_exit_ext_func_mode(dev); + +} + +void w83627hf_pnp_enable(struct device * dev) +{ + + if (!dev->enabled) { + pnp_enter_ext_func_mode(dev); + + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + + pnp_exit_ext_func_mode(dev); + } +} + +static struct device_operations ops = { + .phase4_read_resources = pnp_read_resources, + .phase4_set_resources = w83627hf_pnp_set_resources, + .phase4_enable_disable = w83627hf_pnp_enable_resources, + .phase5_enable_resources = w83627hf_pnp_enable, + .phase6_init = w83627hf_init, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, W83627HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + // No 4 { 0,}, + { &ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, }, + { &ops, W83627HF_GPIO2, }, + { &ops, W83627HF_GPIO3, }, + { &ops, W83627HF_ACPI, }, + { &ops, W83627HF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); +} +/* +struct chip_operations superio_winbond_w83627hf_ops = { + CHIP_NAME("Winbond W83627HF Super I/O") + .enable_dev = enable_dev, +}; +*/ diff --git a/superio/winbond/w83627hf/w83627hf.h b/superio/winbond/w83627hf/w83627hf.h new file mode 100644 index 0000000000..7cd664cd16 --- /dev/null +++ b/superio/winbond/w83627hf/w83627hf.h @@ -0,0 +1,91 @@ +#define W83627HF_FDC 0 /* Floppy */ +#define W83627HF_PP 1 /* Parallel Port */ +#define W83627HF_SP1 2 /* Com1 */ +#define W83627HF_SP2 3 /* Com2 */ +#define W83627HF_KBC 5 /* Keyboard & Mouse */ +#define W83627HF_CIR 6 +#define W83627HF_GAME_MIDI_GPIO1 7 +#define W83627HF_GPIO2 8 +#define W83627HF_GPIO3 9 +#define W83627HF_ACPI 10 +#define W83627HF_HWM 11 /* Hardware Monitor */ + +//#define W83627HF_GPIO_DEV PNP_DEV(0x2e, W83627HF_GPIO) +//#define W83627HF_XBUS_DEV PNP_DEV(0x2e, W83627HF_XBUS) + +#define W83627HF_GPSEL 0xf0 +#define W83627HF_GPCFG1 0xf1 +#define W83627HF_GPEVR 0xf2 +#define W83627HF_GPCFG2 0xf3 +#define W83627HF_EXTCFG 0xf4 +#define W83627HF_IOEXT1A 0xf5 +#define W83627HF_IOEXT1B 0xf6 +#define W83627HF_IOEXT2A 0xf7 +#define W83627HF_IOEXT2B 0xf8 + +#define W83627HF_GPDO_0 0x00 +#define W83627HF_GPDI_0 0x01 +#define W83627HF_GPDO_1 0x02 +#define W83627HF_GPDI_1 0x03 +#define W83627HF_GPEVEN_1 0x04 +#define W83627HF_GPEVST_1 0x05 +#define W83627HF_GPDO_2 0x06 +#define W83627HF_GPDI_2 0x07 +#define W83627HF_GPDO_3 0x08 +#define W83627HF_GPDI_3 0x09 +#define W83627HF_GPDO_4 0x0a +#define W83627HF_GPDI_4 0x0b +#define W83627HF_GPEVEN_4 0x0c +#define W83627HF_GPEVST_4 0x0d +#define W83627HF_GPDO_5 0x0e +#define W83627HF_GPDI_5 0x0f +#define W83627HF_GPDO_6 0x10 +#define W83627HF_GPDO_7A 0x11 +#define W83627HF_GPDO_7B 0x12 +#define W83627HF_GPDO_7C 0x13 +#define W83627HF_GPDO_7D 0x14 +#define W83627HF_GPDI_7A 0x15 +#define W83627HF_GPDI_7B 0x16 +#define W83627HF_GPDI_7C 0x17 +#define W83627HF_GPDI_7D 0x18 + +#define W83627HF_XIOCNF 0xf0 +#define W83627HF_XIOBA1H 0xf1 +#define W83627HF_XIOBA1L 0xf2 +#define W83627HF_XIOSIZE1 0xf3 +#define W83627HF_XIOBA2H 0xf4 +#define W83627HF_XIOBA2L 0xf5 +#define W83627HF_XIOSIZE2 0xf6 +#define W83627HF_XMEMCNF1 0xf7 +#define W83627HF_XMEMCNF2 0xf8 +#define W83627HF_XMEMBAH 0xf9 +#define W83627HF_XMEMBAL 0xfa +#define W83627HF_XMEMSIZE 0xfb +#define W83627HF_XIRQMAP1 0xfc +#define W83627HF_XIRQMAP2 0xfd +#define W83627HF_XBIMM 0xfe +#define W83627HF_XBBSL 0xff + +#define W83627HF_XBCNF 0x00 +#define W83627HF_XZCNF0 0x01 +#define W83627HF_XZCNF1 0x02 +#define W83627HF_XIRQC0 0x04 +#define W83627HF_XIRQC1 0x05 +#define W83627HF_XIRQC2 0x06 +#define W83627HF_XIMA0 0x08 +#define W83627HF_XIMA1 0x09 +#define W83627HF_XIMA2 0x0a +#define W83627HF_XIMA3 0x0b +#define W83627HF_XIMD 0x0c +#define W83627HF_XZCNF2 0x0d +#define W83627HF_XZCNF3 0x0e +#define W83627HF_XZM0 0x0f +#define W83627HF_XZM1 0x10 +#define W83627HF_XZM2 0x11 +#define W83627HF_XZM3 0x12 +#define W83627HF_HAP0 0x13 +#define W83627HF_HAP1 0x14 +#define W83627HF_XSCNF 0x15 +#define W83627HF_XWBCNF 0x16 + + diff --git a/superio/winbond/w83627hf/w83627hf_early_init.c b/superio/winbond/w83627hf/w83627hf_early_init.c new file mode 100644 index 0000000000..e449c4ae9c --- /dev/null +++ b/superio/winbond/w83627hf/w83627hf_early_init.c @@ -0,0 +1,15 @@ +#include +#include "w83627hf.h" + +static void w83627hf_disable_dev(device_t dev) +{ + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); +} +static void w83627hf_enable_dev(device_t dev, unsigned iobase) +{ + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); +} diff --git a/superio/winbond/w83627hf/w83627hf_early_serial.c b/superio/winbond/w83627hf/w83627hf_early_serial.c new file mode 100644 index 0000000000..6ca089ac50 --- /dev/null +++ b/superio/winbond/w83627hf/w83627hf_early_serial.c @@ -0,0 +1,23 @@ +#include +#include "w83627hf.h" + +static inline void pnp_enter_ext_func_mode(device_t dev) +{ + unsigned port = dev>>8; + outb(0x87, port); + outb(0x87, port); +} +static void pnp_exit_ext_func_mode(device_t dev) +{ + unsigned port = dev>>8; + outb(0xaa, port); +} +static void w83627hf_enable_serial(device_t dev, unsigned iobase) +{ + pnp_enter_ext_func_mode(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); + pnp_exit_ext_func_mode(dev); +}